Substrate bias for MOS integrated circuit

Details Substrate bias for MOS integrated circuit Substrate bias for MOS integrated circuit

1976-12-27

1978-09-19

Anagnos, Larry N.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307200B, 307297, H03K 102, H03K 3353

Patent

active

041157109

ABSTRACT:
A charge pump circuit for generating a substrate bias for MOS/LSI integrated circuit chips is provided, preferably for P-channel integrated circuits. The charge pump circuit includes an osicllator producing a square wave which is applied to a reference circuit that is also responsive to a threshold voltage Vt monitor. The reference circuit applies to a pump diode a square wave having a level responsive to the supply and thresholds. A zero voltage drop source follower connects the square wave to the diode to avoid loading. The threshold monitor forces the square wave to a high level when the threshold is below a certain value.

REFERENCES:
patent: 3609414 (1971-09-01), Pleshko et al.
patent: 3794862 (1974-02-01), Jenne
patent: 3806741 (1974-04-01), Smith
patent: 3970875 (1976-07-01), Leehan
patent: 4016434 (1977-04-01), DeFilippi
Hummel, "Sentry Circuit for Substrate Voltage Control", IBM Tech. Discl. Bull.; vol. 15, No. 2, pp. 478-479; 7/1972.
Frantz, "Threshold Voltage Control for N-Channel MOSFET Devices"; IBM Tech. Discl. Bull.; vol. 12, No. 12, p. 2078; 5/1970.
Blaser et al., "Substrate and Load Voltage Compensation", 1976 IEEE Int'l. Solid-State Circuits Conf.; pp. 56-57; 2/1976.
Chang, "FET N-Channel Threshold-Voltage-Control Circuit"; IBM Tech. Discl. Bull.; vol. 17, No. 1, p. 140; 6/1974.
Kubo et al., "A Threshold Voltage Controlling Circuit for Short Channel MOS Circuits", 1976 IEEE Int'l Solid-State Circuit Conf.; pp. 54-55; 2/1976.
Sonoda, "Active Decoupling Circuit", IBM Tech. Discl. Bull.; vol. 17, No. 5, p. 1369; 10/1974.
Frantz et al., "MOSFET Substrate Bias-Voltage Generator"; IBM Tech. Discl. Bull., vol. 11, No. 10, p. 1219; 3/1969.

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