Substrate bias circuit and method for integrated circuit device

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S536000

Reexamination Certificate

active

07911261

ABSTRACT:
A substrate biasing circuit may include a first pump control circuit that generates a first control signal in response to a first reference voltage and a voltage of a first substrate portion, and includes a first reference generator coupled between a temperature compensated voltage and a reference power supply voltage that varies the first reference voltage in response to the voltage of the first substrate voltage and the temperature compensated voltage. A first clamp circuit may generate a first clamp signal in response to a first limit voltage and the voltage of the first substrate portion, the first limit voltage being a scaled version of the temperature compensated voltage. A first charge pump may pump the first substrate portion in at least a first voltage direction in response to the first control signal, and is prevented from pumping in the first voltage direction in response to the first clamp signal.

REFERENCES:
patent: 4142114 (1979-02-01), Green
patent: 4229667 (1980-10-01), Heimbigner et al.
patent: 4439692 (1984-03-01), Beekmans et al.
patent: 4585954 (1986-04-01), Hashimoto et al.
patent: 4628214 (1986-12-01), Leuschner
patent: 4775959 (1988-10-01), Sato et al.
patent: 4794278 (1988-12-01), Vajdic
patent: 5602506 (1997-02-01), Kim et al.
patent: 5721510 (1998-02-01), Miyajima
patent: 5818213 (1998-10-01), Kim
patent: 5818290 (1998-10-01), Tsukada
patent: 6072357 (2000-06-01), Jo
patent: 6529421 (2003-03-01), Marr et al.
patent: 6535435 (2003-03-01), Tanaka et al.
patent: 6741118 (2004-05-01), Uchikoba et al.
patent: 6914474 (2005-07-01), Yamahira
patent: 6936998 (2005-08-01), Cho
patent: 7012461 (2006-03-01), Chen et al.
patent: 7129745 (2006-10-01), Lewis et al.
patent: 7129771 (2006-10-01), Chen
patent: 7138851 (2006-11-01), Sumita et al.
patent: 7145318 (2006-12-01), Chan et al.
patent: 7151365 (2006-12-01), Nakata
patent: 7330049 (2008-02-01), Perisetty
patent: 7427890 (2008-09-01), Chan
patent: 7479820 (2009-01-01), Okamoto et al.
patent: 7583131 (2009-09-01), Kimura et al.
patent: 7675348 (2010-03-01), Sumita et al.
patent: 2007/0132504 (2007-06-01), Sumita et al.
patent: 2007/0236276 (2007-10-01), Fujita et al.
patent: 2007/0236277 (2007-10-01), Naritake

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