Subranging analog-to-digital converter with calibration

Coded data generation or conversion – Converter calibration or testing

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Details

341161, H03M 110

Patent

active

049471686

ABSTRACT:
A successive sub-ranging A/D converter circuit is disclosed which incorporates adaptive error correction for a high accuracy digitization of analog input signals. The circuit comprises an A/D converter operative to convert analog input signals into a digital output signal, and a test circuit for generating digital signals to correct for errors in the A/D converter. The test circuit includes control circuitry for generating a series of digital test signals, and a highly accurate, first D/A converter for generating a respective series of analog test signals for communication to the input circuit. Circuitry is provided for combining the digital test signals with respective outputs of the least significant bit (LSB) quantizer of the A/D converter, and for generating a digital correction signal representative of the differences therebetween. The correction signals are representative of the corrected output of the A/D converter system, given the respective test signals and output signals from the LSB quantizer. A first memory storage device is provided for storing the correction signals at memory locations addressable by output signals from the MSB quantizer. Summing circuitry is connected to the memory storage device for selectively adding stored error correction signals to the output of the LSB quantizer to correct for offset errors unique to each sub-range segment that may be occupied by the analog input signal.

REFERENCES:
patent: 4315254 (1982-02-01), Honjyo et al.
patent: 4612533 (1986-09-01), Evans
patent: 4639715 (1987-01-01), Doluca
patent: 4799041 (1989-01-01), Layton

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