Submicron MOSFET having asymmetric channel profile

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device

Reexamination Certificate

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C257S220000, C257S221000

Reexamination Certificate

active

06744083

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to MOSFET transistors, and more particularly the invention relates to MOSFET devices having submicron channels with asymmetric profiles.
There has been intensive investigation of metal-oxide-semiconductor field effect transistors (MOSFETs) below 100 nm. One of the key challenges in scaling of the MOSFET is to improve the drive current without degradation of the short channel performance and off-gate leakage current. Strained Si
1-x
Ge
x
has attracted much attention recently because of the hole mobility improvement in the strained layer, leading to PMOSFET drive current improvement. However, the short channel effects and off state leakage current are also degraded due to the smaller band gap in the Si
1-x
Ge
x
layer.
Suppression of short channel and hot carrier effects without sacrificing drive current is also a key challenge in sub-100 nm devices. Lightly doped drain MOSFETs (LDDS) have been widely used to suppress hot carrier effects. However, the drive capability is also degraded due to high series resistance introduced by the lightly doped drain.
The present invention is directed to providing an improved submicron MOSFET through use of an asymmetric channel profile.
BRIEF SUMMARY OF THE INVENTION
In accordance with the invention, the performance of MOSFETs is significantly improved by incorporating asymmetric channel profiles, either material, doping profile, or both.
In accordance with one embodiment of the invention, band gap engineering is incorporated into the channel of a MOSFET. On the source side, the channel is made of silicon, so the short channel performance is not degraded compared with a silicon device. The rest of the channel is made of strained Si
1-x
Ge
x
so that the hole mobility in the strain Si
1-x
Ge
x
can be utilized.
In accordance with another embodiment of the invention, a graded doping profile is employed in the channel of a MOSFET device. The graded doping in the channel can be formed by in situ doping during chemical vapor deposition or by conventional single step ion implantation. Doping is graded in the channel and higher at the source end, which allows off-state leakage current, drain induced barrier lowering (DIBL) effect and hot carrier effects to be suppressed significantly while the drive current is improved.
The invention and objects and features thereof will be more readily apparent from the following detailed description and appended claims when taken with the drawings.


REFERENCES:
patent: 5293052 (1994-03-01), Cherne et al.
patent: 5830788 (1998-11-01), Hiroki et al.
patent: 6255174 (2001-07-01), Yu
patent: 2002/0030227 (2002-03-01), Bulsara et al.
Lundstrom, M., “Elementary Scattering Theory of the Si MOSFET,”IEEE Electron Device Letters,vol. 18, No. 7, pp. 361-363, Jul. 1997.
Verdonckt-Vanderbroek, S. et al., “SiGe-Channel Heterojunction &rgr;-MOSFETs,”IEEE Trans. Electron Devices,vol. 41, No. 1, pp. 90-100, Jan. 1994.
Chen, Xiangdong et al., “An asymmetric Si/Sil-xGexchannel vertical p-type metal-oxide-semiconductor field-effect transistor,”Solid State Electronics,vol. 45, pp. 281-285, Jan. 2001.

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