Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
1998-09-23
2002-04-02
Ghayour, Mohammad H. (Department: 2734)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
Reexamination Certificate
active
06366626
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates in general to communication systems, and is particularly directed to reduced complexity matched filter architecture having its temporal length subdivided into cascaded sub-symbol filter segments, the number of sub-symbol segments is selected to prevent loss of an unacceptable amount of signal energy over received signal frequency uncertainty &dgr;
f
. The sub-symbol filter segments are processed in plural phase rotation-signal combiner stages, outputs of which are associated with multiple frequency bins, the number of which is a trade-off between desired granularity and cost. A respective phase rotation-signal combiner stage multiplies sub-symbol filter segments by respectively offset phase rotation vectors, associated with the plural frequency bins. The sub-symbol phase vector products of each stage are summed to produce plural frequency bin outputs.
BACKGROUND OF THE INVENTION
A frequent requirement of portable wireless devices (e.g., pagers or tag-embedded transponders for object tracking) is that the transmitter be small, inexpensive and battery-powered. This dictates using relatively low cost components that not only transmit a signal at a relatively low power level but inherently have relatively ‘sloppy’ tolerances that result in a large frequency uncertainty &dgr;
f
. Often the only effective means to realize a useful communication range is to transmit relatively long (e.g., low data rate spread spectrum) symbols, so as to increase the total energy per symbol to an acceptable level. At a receiver site, this mandates processing each symbol in a coherent fashion in order to fully exploit its energy. Unfortunately, the frequency uncertainty &dgr;
f
is often too high relative to the symbol rate R
s
to allow conventional matched filter processing. Indeed,
FIG. 1
, which shows the implementation loss of coherent signal processing as a function of the &dgr;
f
/R
s
ratio, reveals unacceptable recovered energy degradation when the &dgr;
f
/R
s
ratio exceeds+/−0.5 cycles per symbol. This frequency uncertainty problem has often been corrected at the receiver by ‘tuning’ the receiver's signal processing mechanism to what was received.
As diagrammatically illustrated in
FIG. 2
, this typically involves adjusting a local oscillator
11
, whose output is multiplied in a mixer
12
by a received signal
13
for application to a downstream matched filter
15
. Where tuning a single local oscillator is infeasible, for example where the transmitted signal is of relatively short duration (e.g., bursty) or multiple signals are transmitted simultaneously (as in the case of multiple pagers or tag transponders, referenced above), the receiver's processing circuitry may be replicated multiple times, as shown in
FIG. 3
, using a plurality of respectively different local oscillators LO
1
, LO
2
, LO
3
, LO
4
, . . . , LO
M
to ensure that one of the plurality of local oscillator—mixer—matched filter processing paths
12
-
1
/
15
-
1
, . . . ,
12
-N/
15
-M (frequency bins) will produce an output signal having an acceptable &dgr;
f
/R
s
ratio. Unfortunately, this matched filter circuitry replication approach necessarily substantially increases the complexity and cost of the receiver processor.
SUMMARY OF THE INVENTION
In accordance with the present invention, the above discussed frequency uncertainty problem is successfully addressed by a new and improved ‘sub-symbol’ matched filter architecture, that subdivides the matched filter into a plurality of successive (cascaded) sub-symbol filter segments MF
1
, MF
2
, MF
3
, . . . MF
N
. Each sub-symbol filter segment has a duration T
s
/N (where T
s
is the overall temporal span of the matched filter). The segment duration T
s
/N is short enough to avoid the loss of an unacceptable amount of signal energy over the frequency uncertainty &dgr;
f
that would otherwise prevent recovery of the transmitted signal.
Each sub-symbol matched filter segment MF
i
is applied to a plurality K of phase rotation-signal combiner stages S
1
, S
2
, S
3
, . . . S
K
, the outputs of which are associated with K frequency bins. A respective phase rotation-signal combiner stage S
i
contains a plurality of N multipliers that are operative to multiply the outputs of the sub-symbol filter segments by a set of respectively offset phase rotation vectors. The sets of offset N phase rotation vectors of each of the phase rotation-signal combiner stages differ from one another, in association with the K frequency bins. The N sub-symbol phase vector products of a respective jth stage are summed to produce a respective one of the K frequency bin outputs.
The number K (of frequency bins) is a trade-off between the desired granularity of the filter and cost, while the number N (of sub-symbol segments) is selected to prevent loss of an unacceptable amount of signal energy over the frequency uncertainty &dgr;
f
. The sub-symbol segmented matched filter processor facilitates implementing the multiple frequency bin paths of
FIG. 3
by means of only a single matched filter data register, and replicating the same signal combiner circuitry for each of the plurality of K frequency bins. By quantizing the sub-symbols'phase rotations to readily implementable digital signal processing values, such as integral multiples of &pgr;/2 (90°), the circuit complexity of the phase rotation multipliers is reduced to direct and inverted connections between a respective sub-symbol segment and a single adder. This enables plural frequency bins for relatively long symbols to be processed on a single integrated circuit chip.
REFERENCES:
patent: 5694388 (1997-12-01), Sawahashi et al.
patent: 5867526 (1999-02-01), Nagazumi
patent: 6154487 (2000-11-01), Murai et al.
patent: 6208683 (2001-03-01), Mizuguchi et al.
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Ghayour Mohammad H.
Wherenet Corp.
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