Sub-sampling apparatus and method and image sensor employing...

Details Sub-sampling apparatus and method and image sensor employing... Sub-sampling apparatus and method and image sensor employing...

2008-07-01

2008-07-01

Ye, Lin (Department: 2622)

Television

Camera, system and detail

Solid-state image sensor

C348S308000, C348S312000, C358S445000, C358S426010, C711S211000, C711S217000

Reexamination Certificate

active

07394494

ABSTRACT:
The present disclosure relates to an address sub-sampling apparatus and method, and an image sensor employing the same. An address sub-sampling apparatus includes a counting unit that generates a binary address of N bits, N being a natural number larger than 2. The address sub-sampling apparatus also includes an address conversion unit that sub-samples the binary address of N bits to output a sub-sampled address having first, second and third bit groups, wherein the sub-sampled address is arranged in order of the third, the first and the second bit groups from the MSB (Most Significant Bit). The first bit group, which is a combination of digits in the sub-sampled address corresponding to the number of addresses to be skipped, being set as “0”, the second bit group, which includes the LSB (Least Significant Bit) corresponding to bits of the binary address, and the third bit group, which includes the MSB being set to shift address subtracted by the number of bits in the first bit group from the MSB in the binary address.

REFERENCES:
patent: 4206503 (1980-06-01), Woods et al.
patent: 5124812 (1992-06-01), Sato et al.
patent: 5208660 (1993-05-01), Yoshida
patent: 6961338 (2005-11-01), Nabesako et al.
patent: 2001/0000819 (2001-05-01), Manning

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