Sub-micron space liner and densification process

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S424000, C438S430000, C438S435000, C438S436000, C257SE21540

Reexamination Certificate

active

07112513

ABSTRACT:
A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, an oxygen barrier is deposited into the trench. An expandable, oxidizable liner, preferably amorphous silicon, is then deposited. The trench is then filled with a spin-on dielectric (SOD) material. A densification process is then applied, whereby the SOD material contracts and the oxidizable liner expands. Preferably, the temperature is ramped up while oxidizing during at least part of the densification process. The resulting trench has a negligible vertical wet etch rate gradient and a negligible recess at the top of the trench.

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Peters, Laura, “Choices and Challenges for Shallow Trench Isolation,”Semiconductor International, Website www.ree-electronics.com, 6 pages, Apr. 1, 1999.

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