Sub-channel distortion mitigation in parallel digital systems

Details Sub-channel distortion mitigation in parallel digital systems Sub-channel distortion mitigation in parallel digital systems

2008-06-09

2010-10-05

Nguyen, Khai M (Department: 2819)

Coded data generation or conversion

Converter compensation

C341S155000

Reexamination Certificate

active

07808407

ABSTRACT:
A method and apparatus for compensating for gain offset, bias offset, and skew in a parallel processing environment is disclosed. The method and apparatus may be configured to compensate for mismatches between the sub-channel signals in a parallel ADC. This allows for accurate combination of the signals on the sub-channels. The method and apparatus may be utilized in a high speed data communication system having two or more channels, each of which are interleaved into two or more sub-channels. In one embodiment a DC loop processes signals on two or more sub-channels to account for and remove unwanted bias offset. In one embodiment a sub-channel gain mismatch compensation system (SCGMC) processes signals on two or more sub-channels to account for and remove unwanted gain offset. In one embodiment a skew compensation system, such as a parallel interpolator, processes signals on two or more sub-channels to remove unwanted skew across sub-channels.

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