Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2006-10-17
2006-10-17
Sarkar, Asok Kumar (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S778000, C257SE23060
Reexamination Certificate
active
07122895
ABSTRACT:
A method of forming a membrane for use in conjunction with a semiconductor carrier and the membrane which includes an electrically insulating substrate and an interconnect pattern formed on the substrate. A stud is coupled to the interconnect pattern over the substrate by forming a gold ball, preferably by gold ball bonding techniques, and coating a portion of the gold ball with a compliant material, preferably an epoxy resin. The coating is filled with a material having sufficient hardness to be capable of penetrating the oxide film on the contact pads of semiconductor devices. The flakes are preferably silver or silver-based.
REFERENCES:
patent: 5497545 (1996-03-01), Watanabe et al.
patent: 5650595 (1997-07-01), Bentlage et al.
patent: 5674780 (1997-10-01), Lytle et al.
patent: 6020220 (2000-02-01), Gilleo et al.
patent: 6104082 (2000-08-01), Berlin et al.
patent: 633607 (1995-11-01), None
Arnold Richard W.
Beardain Weldon
Forster James A.
Wilson Lester L.
Brady III Wade James
Sarkar Asok Kumar
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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