Stuck fault detection for branch instruction condition signals

Details Stuck fault detection for branch instruction condition signals Stuck fault detection for branch instruction condition signals

1993-12-23

1996-02-27

Beausoliel, Jr., Robert W.

Excavating

371 55, 371 572, G06F 1100, H03M 1300

Patent

active

054955980

ABSTRACT:
A method and apparatus for detecting stuck faults in a signal line used to communicate a branch condition for executing conditional branch instructions by a data processing system containing a programmable microprocessor and multiple VLSI gate arrays connected by a bi-directional bus, whereby the branch condition is obtained from a storage location resident on a VLSI gate array executing asynchronous and external to the microprocessor. The branch condition is fetched and evaluated in parallel with the fetching of the branch target address and the incrementing of the program counter. The microprocessor changes instruction sequence control depending on the results of the branch condition evaluation. The branch condition is sent to the microprocessor as a signal pulse for a specified duration at a particular time, rather than by changing the level of the signal, thereby allowing communication of the branch condition over only one signal line but still providing for detection of faults in the VSLI gate array or faults inherent in the signal line.

REFERENCES:
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patent: 4813044 (1989-03-01), Kumar
patent: 4852093 (1989-07-01), Koeppe
patent: 4972414 (1990-11-01), Borkenhagen
patent: 5018144 (1991-05-01), Corr

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