Multiplex communications – Communication techniques for information carried in plural... – Assembly or disassembly of messages having address headers
Reexamination Certificate
1999-12-22
2004-04-13
Chin, Wellington (Department: 2664)
Multiplex communications
Communication techniques for information carried in plural...
Assembly or disassembly of messages having address headers
C370S470000, C370S464000
Reexamination Certificate
active
06721336
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to telecommunications, and more particularly, to asynchronous transfer mode (ATM) and synchronous transport signal-n (STS-n) communications.
2. Background
The telecommunications industry has developed standards for transporting communication signals synchronously using a synchronous payload envelope (SPE). An example of an industry-standard SPE is a synchronous optical network (SONET) frame, which has a frame length of 125 &mgr;s and a frame rate of 8 KHz. Conventional digital telephony signals are formatted for SONET communications over a conventional narrowband synchronous transport signal (STS) interface. Standards developed for the STS include STS-1, which is a synchronous transport signal-level 1, STS-3, which is 1a synchronous transport signal-level 3, and STS-12, which is a synchronous transport signal-level 12.
It is desirable that asynchronous transfer mode (ATM) cells be transported in the form of an STS within the bandwidth of a standard SPE, such as a SONET frame. Schemes have been developed for delineation and assembly of ATM cells as broadband STS for SONET communication. Conventional SONET bandwidth allocation allows a standard SONET frame to be divided into SONET bandwidth portions for carrying 12 STS-1 signals, 4 STS-3c signals, or a single STS-12c signal. For STS-3c and STS-12c, the letter “c” stands for “concatenated”. ATM cells which are transported over the SONET as broadband STS are in the form of broadband STS-1, broadband STS-3c, or broadband STS-12c.
Because the standard broadband STS for carrying ATM traffic must be in the form of STS-1, STS-3c or STS-12c, conventional cell delineation and assembly may result in inefficient allocation of the SONET bandwidth if the ATM cells occupy some but not all of the SONET bandwidth and do not fit exactly within the bandwidth allocated for a single STS-1, a single STS-3c, or a single STS-12c. Because of the limitation of standard STS formats to STS-1, STS-3 and STS-12, conventional SONET transport of ATM cells using conventional ATM cell delineation and assembly techniques may result in significant portions of the SONET bandwidth being wasted when ATM cells are transported over the SONET.
Therefore, there is a need for efficient SONET bandwidth allocation for transporting ATM cells over the SONET. Furthermore, it is desirable that efficient SONET bandwidth allocation be achieved with enhanced granularity of STS-n without requiring highly complicated hardware designs for ATM cell delineation and assembly of non-standard STS.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method of allocating bandwidth for transporting asynchronous transfer mode (ATM) cells in the form of a synchronous transport signal-n (STS-n) in a temporal frame roughly comprises the steps of:
(a) dividing the temporal frame into a plurality of bandwidth portions;
(b) assigning a first number of the bandwidth portions for transporting ATM cells; and
(c) assigning a second number of the bandwidth portions for transporting a narrowband STS.
In an embodiment, the temporal frame comprises a synchronous optical network (SONET) frame, which defines a synchronous payload envelope (SPE) for the STS. In an embodiment, the SONET frame is divided into twelve equal bandwidth portions capable of carrying ATM traffic in the form of broadband STS as well as conventional narrowband STS. The bandwidth of the SONET frame for transporting the ATM traffic is capable of being dynamically and flexibly allocated based upon the size of the ATM payload. In an embodiment, the first number of bandwidth portions for transporting the ATM cells can be any integer between 0 and 12, and the second number of the bandwidth portions for transporting the narrowband STS can also be any integer between 0 and 12. In this embodiment, the sum of the first and second integers is equal to 12.
In an embodiment in which the SONET frame is divided into twelve equal bandwidth portions, a first ten of the bandwidth portions for transporting the ATM cells are delineated by four cell delineators, and an eleventh bandwidth portion following the first ten bandwidth portions for transporting the ATM cells is delineated by a fifth cell delineator. In an embodiment, a single cell delineator is used for delineating the ATM cells in the form of a broadband STS-12c signal if all of the twelve bandwidth portions in a SONET frame are allocated for transporting the ATM cells.
In an embodiment, the ATM cells are carried within the SONET frame in the form of at least one broadband STS selected from the group consisting of standard STS-1, STS-3c, and STS-12c. The ATM cells within each SONET frame may be transported in the form of a broadband STS-n signal which is equivalent to a combination of one or more standard STS-1 or STS-3c signals. For the broadband STS-n signal, n may be any integer between 1 and 12. The broadband STS-n is formed as a combination of broadband STS-1 or STS-3c signals if it is not an STS-1, STS-3c or STS-12c itself. In an embodiment in which the broadband STS-n signal carrying the ATM cells does not completely occupy the SONET bandwidth, a narrowband STS can be multiplexed with the broadband STS within the SONET frame.
The present invention also provides an asynchronous transfer mode (ATM) cell framer, roughly comprising:
(a) a plurality of cell delineators having a plurality of synchronous transport signal (STS) cell delineator inputs, a plurality of cell delineator framer control inputs and a plurality of cell delineator outputs capable of outputting a plurality of ATM cells;
(b) a plurality of cell assemblers having a plurality of cell assembler inputs, a plurality of cell assembler framer control inputs and a plurality of cell assembler outputs; and
(c) a cell framer controller, connected to the cell delineator framer control inputs and the cell assembler framer control inputs, to provide synchronization to the cell delineators and to the cell assemblers.
In an embodiment, the cell framer further comprises a cell delineator output multiplexer connected to the cell delineator outputs, to generate an output ATM data stream comprising the ATM cells extracted from the broadband STS-n. In a further embodiment, the cell delineators each comprise a cell delineator buffer connected to the cell delineator output multiplexer. In yet a further embodiment, the cell delineator buffer in each of the cell delineators comprises a first-in-first-out (FIFO) buffer memory. In an embodiment, the cell framer controller is also connected to the cell delineator output multiplexer to provide a transmit starter cell signal for the output ATM data stream.
In an embodiment, the cell framer further comprises a cell assembler input multiplexer connected to the cell assembler inputs. The cell assembler input multiplexer is capable of receiving an input ATM data stream comprising a plurality of ATM cells for assembly by the cell assemblers to form a broadband STS-n. In a further embodiment, the cell assemblers each comprise a cell assembler buffer connected to the cell assembler input multiplexer. In yet a further embodiment, the cell assembler buffer in each of the cell assemblers comprises a FIFO buffer memory. In an embodiment, the cell framer controller is also connected to the cell assembler input multiplexer to provide a receive starter cell signal for the input ATM data stream.
In an embodiment, the cell framer further comprises a cell delineator input multiplexer having an STS-n input and a plurality of outputs connected to the cell delineator inputs respectively, wherein n is an integer between 1 and 12. In a further embodiment, the cell delineators each comprise a serial-to-parallel converter connected to a respective one of the outputs of the cell delineator input multiplexer for cell delineation. In an embodiment, the cell framer controller is also connected to the cell delineator input multiplexer to synchronize the arrival of the STS-n signal from the STS-n input.
In an embodiment, the cell fra
Dove Jason
Franceschini Paul
Witel Rodney
Alcatel
Chin Wellington
Fox Jamal A.
Hoersten Craig A.
Mysliwiec Richard A.
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