Stock material or miscellaneous articles – All metal or with adjacent metals – Composite; i.e. – plural – adjacent – spatially distinct metal...
Reexamination Certificate
2002-06-19
2004-07-20
Jones, Deborah (Department: 1775)
Stock material or miscellaneous articles
All metal or with adjacent metals
Composite; i.e., plural, adjacent, spatially distinct metal...
C428S620000, C428S689000, C428S698000, C428S702000, C428S704000, C257S759000, C257S760000, C257S762000, C257S763000, C257S774000, C257S751000, C438S623000, C438S624000, C438S628000, C438S680000
Reexamination Certificate
active
06764774
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor electronic device structure comprising dielectric layers having improved adhesion to other dielectric or conducting layers. More particularly, the present invention relates to using a layer of amorphous silicon (a-Si) or amorphous Germanium (a-Ge) (or alloys thereof) as an adhesion enhancing interfacial layer. Furthermore, the present invention relates to a method for improving the adhesion between different dielectric or conductive layers including those that include Si or C.
2. Description of the Prior Art
The continuous shrinking in dimensions of electronic devices utilized in ULSI circuits in recent years has resulted in increasing the resistance of the BEOL metallization as well as increasing the capacitance of the intralayer and interlayer dielectric. This combined effect increases signal delays in ULSI electronic devices. In order to improve the switching performance of future ULSI circuits, low dielectric constant (k) insulators and particularly those with k significantly lower than silicon oxide are being introduced to reduce the capacitances.
The low-k materials that have been considered for applications in ULSI devices include polymers containing Si, C, O and H, such as methylsiloxane, methylsilsesquioxanes, and other organic and inorganic polymers which are fabricated by spin-on techniques or, Si, C, O and H containing materials (SiCOH, SiOCH, carbon-doped oxides (CDO), silicon-oxicarbides, organosilicate glasses (OSG)) deposited by plasma enhanced chemical vapor deposition (CVD) techniques. The incorporation of the low-k dielectrics in the interconnect structures of integrated circuits (IC) often requires the use of other dielectric materials as diffusion barrier caps or etch-stop and chemo-mechanical polishing (CMP) hardmasks. The adhesion between the different layers in the complex structures of an IC device is often too low, resulting in delaminations during the processing of the device. This is especially true for adhesion of dielectric or metallic layers to SiO
2
. Furthermore, an intermediate layer of refractory metal nitride is generally needed to provide suitable adhesion between the metallic Cu-diffusion barrier and the dielectric insulator of the interconnect structure. The conductive nitride layer, typically of lower conductivity than the metallization layers occupies a significant thickness of the shrinking metallization and increases its resistivity. The elimination of this conductive nitride layer by substituting it with a very thin adhesion layer can improve the performance of ULSI devices.
It would thus be highly desirable to provide a semiconductor device comprising an insulating structure including comprising a multitude of dielectric and conductive layers with good adhesion between the different layers, and a method for manufacturing said semiconductor device.
As described in U.S. Pat. No. 4,647,494, amorphous Silicon (a-Si) of tens of Angstroms thick has been recognized for improving adhesion of wear resistant carbon coatings to metallic magnetic recording layers in recording tapes and disks. That is, in U.S. Pat. No. 4,647,494, a-Si is described as improving adhesion between amorphous hydrogenated carbon (or diamondlike carbon) and silicide forming metals. The use of thin a-Si bonding layer has not been utilized in semiconductor ULSI manufacturing processes to enhance adhesion between dielectric layers of a semiconductor BEOL wiring structure.
It would thus be further highly desirable to provide a semiconductor device structure and method for manufacturing an insulating structure comprising a multitude of dielectric and conductive layers that includes thin a-Si, a-Ge or alloys thereof, bonding layers used to enhance adhesion between the different layers.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an insulating structure comprising a multitude of dielectric and conductive layers with good adhesion between the different layers.
It is a further object of the present invention to provide an insulating structure comprising a multitude of dielectric and conductive layers wherein the adhesion between different layers is enhanced by a thin bonding layer comprising amorphous Si (a-Si), amorphous Ge (a-Ge) or alloys thereof, wherein the thin a-Si (a-Ge or alloys thereof) may be hydrogenated or non-hydrogenated.
It is another object of the present invention to provide an insulating structure comprising a multitude of dielectric and conductive layers wherein the adhesion between different layers is enhanced by a thin amorphous bonding layer comprising amorphous Si (a-Si), amorphous Ge (a-Ge) or alloys thereof, wherein the thin a-Si (a-Ge or alloys thereof) may be at least partially oxidized.
It is another object of the present invention to provide an insulating structure including a thin intermediate a-Si (a-Ge or alloys thereof) bonding layer adhesion layer for enhancing adhesion between an oxide layer, e.g., from the group comprising SiO
2
, phosphorus silicate glass (“PSG”) or boron phosphorus silicate glass (“BPSG”), and a layer from the group comprising SiCOH, SiC, SiCN, SiCH, or SiCNH.
It is yet another object of the present invention to provide an electronic device structure incorporating layers of insulating and conductive materials as intralevel or interlevel dielectrics in a back-end-of-the-line (“BEOL”) wiring structure in which the adhesion between different dielectrics is enhanced by a thin intermediate a-Si bonding layer, or a bonding layer of a-Ge or alloys thereof.
It is still another object of the present invention to provide an electronic device structure incorporating layers of insulating and conductive materials as intralevel or interlevel dielectrics in a BEOL wiring structure in which the adhesion between the conductive layers and the different dielectric layers is enhanced by a thin intermediate a-Si bonding layer, or a bonding layer of a-Ge or alloys thereof.
It is still yet a further object of the present invention to provide a method for fabricating an a-Si adhesion layer (or a layer of a-Ge or alloys thereof) either in a parallel plate plasma enhanced chemical vapor deposition (“PECVD”) reactor or, in a sputtering reactor.
It is yet another object of the present invention to provide an electronic device structure, which comprises at least one a-Si bonding layer (or a layer of a-Ge or alloys thereof) between a dielectric layer and a liner/barrier layer for a Cu metallization structure.
It is another object of the present invention to provide an insulating semiconductor structure comprising a multitude of dielectric and conductive layers wherein the adhesion between different layers is enhanced by a thin amorphous Si (a-Si) bonding layer (or a layer of a-Ge or alloys thereof) which may be at least partially oxidized.
According to the principles of the invention, there is provided a method for fabricating a BEOL interconnect structure with improved adhesion between the layers of the structure. The present invention further provides an electronic device structure that incorporates a-Si layers (or layers of a-Ge or alloys thereof) between dissimilar layers in the structure to improve the adhesion between them. In one embodiment, a thin a-Si layer, 1-100 nm, preferably 2-6 nm thick, is interposed between a silicon oxide layer and a SiCOH layer, enhancing the adhesion between the two layers. In another preferred embodiment, the 1-100 nm, preferably 2-6 nm thick a-Si layer is interposed between a SiCOH dielectric layer and a layer of SiN, SiC, SiCH, or SiCHN, to enhance the adhesion between the layers. In yet another embodiment, the 1-100 nm, preferably 2-6 nm thick a-Si layer is interposed between a dielectric layer and a Ta layer, to enhance the adhesion between the two layers.
In yet another embodiment, the a-Si layer (or a layer of a-Ge or alloys thereof) is incorporated between any two layers from the group comprising SiO
2
, PSG, BPSG, SiN, SiC, SiCH, SiCHN, or SiCOH, Ta, Ti,
Grill Alfred
Lane Michael
Patel Vishnubhai V.
International Business Machines - Corporation
Jones Deborah
Scully Scott Murphy & Presser
Trepp, Esq. Robert M.
Xu Ling
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