Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-07-19
2011-07-19
Memula, Suresh (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C257S213000
Reexamination Certificate
active
07984408
ABSTRACT:
Design structure embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes semiconductor device structures characterized by reduced junction capacitance and drain induced barrier lowering. The semiconductor device structure of the design structure includes a semiconductor layer and a dielectric layer disposed between the semiconductor layer and the substrate. The dielectric layer includes a first dielectric region with a first dielectric constant and a second dielectric region with a second dielectric constant that is greater than the first dielectric constant.
REFERENCES:
patent: 5374564 (1994-12-01), Bruel
patent: 5882987 (1999-03-01), Srikrishnan
patent: 6004837 (1999-12-01), Gambino et al.
patent: 6210998 (2001-04-01), Son
patent: 6479866 (2002-11-01), Xiang
patent: 6509613 (2003-01-01), En et al.
patent: 6727157 (2004-04-01), Seo
patent: 6764898 (2004-07-01), En et al.
patent: 6855639 (2005-02-01), Brask et al.
patent: 7122863 (2006-10-01), Ju et al.
patent: 2003/0024732 (2003-02-01), Ninomiya
patent: 2003/0125925 (2003-07-01), Walther et al.
patent: 2003/0194847 (2003-10-01), Chen et al.
patent: 2006/0001073 (2006-01-01), Chen et al.
patent: 2007/0157140 (2007-07-01), Holesovsky et al.
patent: 2007/0246752 (2007-10-01), Cheng et al.
Timokhov, D. F. et al., “Determination of Structure Parameters of porous Silicon by the Photoelectric Method,” Journal of Physical Studies, V. 8, No. 2 (2004), p. 173-177.
U.S. Patent and Trademark Office, Office Action dated as mailed May 14, 2009 in related U.S. Appl. No. 11/379,655.
U.S. Patent and Trademark Office, Notice of Allowance dated as mailed Sep. 21, 2009 in related U.S. Appl. No. 11/379,655.
Cheng Kangguo
Hsu Louis Lu-Chen
Mandelman Jack Allan
Yang Haining
International Business Machines - Corporation
Memula Suresh
Wood Herron & Evans LLP
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