Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2001-01-04
2002-04-23
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S003000, C438S253000
Reexamination Certificate
active
06376327
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to fabrication of semiconductor devices. More particularly, the present invention relates to methods for forming capacitors with low leakage current.
BACKGROUND OF THE INVENTION
Capacitors are the basic energy storage devices in-memory cells of memory devices such as random access memories (e.g., dynamic random access memory (DRAM) devices, static random access memory (SRAM) devices, and ferroelectric random access memory (FeRAM) devices. Generally, such capacitors consist of two conductive elements (e.g., metal or polysilicon plates), which act as the electrodes of the capacitor (i.e., the storage node electrode and the cell plate capacitor electrode). In the capacitors, the electrodes are insulated from each other by a dielectric material.
The ability to densely pack storage memory cells while maintaining required capacitance levels is a crucial requirement of semiconductor manufacturing technologies if future generations of expanded memory array devices are to be successfully manufactured. As memory devices increase in memory cell density, it is necessary to decrease the size of circuit components, such as capacitors. Thus, there is a continued challenge to maintain sufficiently high storage capacitance while decreasing cell area. It is desirable that each capacitor possesses as much capacitance as possible. Preferably, such capacitors should possess at least about 20×10
−15
farads/cell, and more preferably at least about 60×10
−15
farads/cell, of charge storage capacity.
The capacitance of a capacitor is dependent upon the dielectric constant of the dielectric material between the electrodes of the capacitor, the distance between the electrodes, and the effective area of the electrodes. One way to retain (or even increase) the storage capacity and decrease its size is to increase the dielectric constant of the dielectric layer of the storage cell capacitor. The dielectric constant is a value which is characteristic of a material. Generally, the dielectric constant is proportional to the amount of charge that can be stored in a material when it is interposed between two electrodes. Further, generally, the dielectric constant is the ratio of the capacitance having a given dielectric material to that of the same capacitor having only a vacuum as the dielectric material.
Various high dielectric constant materials have been utilized in capacitors. For example, metal oxides such as TiO
2
, WO
2
, Ta
2
O
5
, BST, and Al
2
O
3
have been used. Further, other relatively high dielectric constant materials include silicon nitride (Si
3
N
4
) and silicon dioxide/silicon nitride composite layers. As used herein, high dielectric constant materials include any materials used for capacitor dielectrics having dielectric constants of about 10 or more.
However, a major problem arises in the implementation of high dielectric constant materials for use in capacitors, such as DRAM capacitors. Generally, for example, after capacitors have been formed using conventional processes for the fabrication of a wafer including many memory devices, various other layers are formed relative to the capacitors to complete the wafer being fabricated. For example, interconnect layers are deposited, insulative materials are deposited, coatings are applied, etc. Many of such layers require the use of high temperatures (e.g. about 400° C. to about 1000° C.) relative to ambient temperature. For example, such post capacitor formation processes may include an annealing or a densification step at a relatively high temperature for a particular material which has been deposited, or further may include the alloying in a hydrogen atmosphere of a complete or almost complete wafer near the end or at the end of wafer processing. As a result of such thermal cycling, e.g., alloying in hydrogen at a relatively high temperature, high dielectric constant materials exhibit loss of oxygen or reduction of such materials during such post capacitor formation thermal cycling. Such a loss of oxygen results in electrically leaky films.
SUMMARY OF THE INVENTION
High dielectric constant materials used in capacitors exhibit a loss of oxygen or reduction of such materials during post capacitor thermal cycling resulting in undesirable effects. For example, it is believed that with the loss of oxygen in such high dielectric constant materials, a conductive path along grain boundaries of the materials is created; the conductive path being an undesirable short circuit path from electrode to electrode. As such, the capacitor exhibits a relatively high leakage current. The present invention uses materials having excess oxygen to reduce such oxygen reduction effects. Such excess oxygen materials or films act as a steady supplier of oxygen atoms during post capacitor formation thermal cycling. As such, oxygen consumed during post capacitor formation thermal cycling does not degrade the performance of the capacitors.
A method for use with the formation of a capacitor according to the present invention includes providing a capacitor structure by forming a first electrode on a portion of a substrate assembly, forming a high dielectric material over at least a portion of the first electrode, and forming a second electrode over the high dielectric material. Another layer is formed over at least a portion of the second electrode. The portion of the substrate assembly on which the first electrode is formed and/or the layer formed over the second electrode are formed of an excess oxygen containing material.
In one embodiment of the method, the excess oxygen containing material includes an ozone enhanced material deposited using an ozone enhanced chemical reaction. In another embodiment, the ozone enhanced material is a doped ozone enhanced material. Preferably, the ozone enhanced material is an ozone enhanced tetraethylorthosilicate material. The ozone enhanced tetraethylorthosilicate material may be doped ozone enhanced tetraethylorthosilicate material, such as doped with boron and phosphorous in a concentration ranging from 0 percent to about 5 percent boron and 0 percent to about 8 percent phosphorous.
In a method for use in forming a memory cell having a capacitor according to the present invention, the method includes providing a capacitor having a first electrode, a second electrode, and a high dielectric material between the first and second electrode. The capacitor is sandwiched between two regions with at least a portion of at least one of the two regions being formed of an ozone enhanced oxide material. Thereafter, one or more post capacitor formation layers during one or more thermal cycles are formed relative to the capacitor. An oxygen concentration of the high dielectric material is substantially maintained during formation of the one or more post capacitor formation layers.
A capacitor structure according to the present invention includes a first electrode formed on at least a portion of a substrate assembly, a dielectric material on at least a portion of the first electrode, a second electrode on the dielectric material, and a layer formed over at least a portion of the second electrode. The portion of the substrate assembly on which the first electrode is formed and/or the layer formed over the second electrode is an excess oxygen containing material.
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Derderian Garo
Sandhu Gurtej S.
Mueting Raasch & Gebhardt, P.A.
Nguyen Tuan H.
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