Structure of split gate transistor for use in a non-volatile sem

Details Structure of split gate transistor for use in a non-volatile sem Structure of split gate transistor for use in a non-volatile sem

1996-08-21

1997-11-25

Nelms, David C.

Static information storage and retrieval

Floating gate

257316, G11C 1604, H01L 2968

Patent

active

056919379

ABSTRACT:
A non-volatile semiconductor memory is composed of split gate type memory cell transistors, each of which comprises a source region and a drain region formed at a principal surface of a semiconductor substrate, separately from each other to form a channel region between the source region and the drain region. This channel region is divided into a first channel region adjacent to the drain region and a second channel region adjacent to the source region. A first gate insulator film is formed on a surface of the first channel region, and a control gate electrode is formed on the first gate insulator film. An insulator layer is formed on the source region and the drain region, and a second gate insulator film is formed on an upper surface and a pair of opposite side surfaces of the control gate electrode and on a surface of the second channel region. A floating gate electrode is formed on the second gate insulator film to have opposite ends terminating on the insulator layer formed on the source region and the insulator layer formed on the drain region, respectively.

REFERENCES:
patent: 4861730 (1989-08-01), Hsia et al.
patent: 5016215 (1991-05-01), Tigelaar
patent: 5349220 (1994-09-01), Hong
patent: 5455793 (1995-10-01), Amin
patent: 5508955 (1996-04-01), Zimmer

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