Structure of semiconductor device with sinker contact region

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With non-planar semiconductor surface

Reexamination Certificate

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Details

C257S378000, C257SE27053

Reexamination Certificate

active

10939221

ABSTRACT:
A method for manufacturing a semiconductor device includes forming a buried layer of a semiconductor substrate. An active region is formed adjacent at least a portion of the buried layer. A first isolation structure is formed adjacent at least a portion of the buried layer. A second isolation structure is formed adjacent at least a portion of the active region. A base layer is formed adjacent at least a portion of the active region. A dielectric layer is formed adjacent at least a portion of the base layer, and then at least part of the dielectric layer is removed at an emitter contact location and at a sinker contact location. An emitter structure is formed at the emitter contact location. Forming the emitter structure includes etching the semiconductor device at the sinker contact location to form a sinker contact region. The sinker contact region has a first depth. The method may also include forming a gate structure. Forming the gate structure includes etching the sinker contact region thereby increasing the first depth of the sinker contact region to a second depth.

REFERENCES:
patent: 4835580 (1989-05-01), Havemann et al.
patent: 5003365 (1991-03-01), Havemann et al.
patent: 5061646 (1991-10-01), Sivan et al.
patent: 5457068 (1995-10-01), Malhi et al.
patent: 5547893 (1996-08-01), Sung
patent: 6066520 (2000-05-01), Suzuki

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