Structure of package on package and method for fabricating...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S697000, C257S780000, C438S118000

Reexamination Certificate

active

07550836

ABSTRACT:
A structure of a package on package and a method for fabricating the same are provided. The structure of the package on package includes a first package, a second package and a plurality of pins. The first package includes a first substrate and a first chip disposed thereon. The second package includes a second substrate and a second chip disposed thereon. The second package is disposed under the first package. The second package includes a plurality of holes. The pins are disposed on the first package and inserted to the holes so as to electrically connect the first package and the second package.

REFERENCES:
patent: 6188127 (2001-02-01), Senba et al.
patent: 2007/0145563 (2007-06-01), Punzalan et al.
patent: 2007/0197099 (2007-08-01), DiStefano

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