Geometrical instruments – Gauge – Collocating
Reexamination Certificate
2001-11-30
2003-06-03
Fulton, Christopher W. (Department: 2859)
Geometrical instruments
Gauge
Collocating
C414S936000
Reexamination Certificate
active
06571485
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a structure of an overlay mark and its dosimetry application. In particular, this invention relates to a structure of an overlay mark that can prevent damage caused by chemical mechanical polishing process due to the design of the inventive structure surpasses the conventional structure and corresponds to the dosimeters of X,Y directions, thus, enhances measurement accuracy and analysis method of the overlay error.
2. Description of the Related Art
In addition to the control of critical dimension (CD), factors for a successfull photolithography process on a wafer include alignment accuracy (AA). Therefore, the measurement of accuracy, that is, the measurement of overlay error is crucial to the semiconductor fabrication process. An overlay mark is used as a tool for measuring overlay error and to determine whether the photoresist pattern is precisely aligned with the previous wafer layer on a wafer after a photolithography process.
FIG. 1
is a top view of a wafer that illustrates positions of conventional overlay marks.
In
FIG. 1
, after the wafer
100
is formed, the wafer
100
is sawed along scribe lines
104
into a plurality of chips or dies
102
. Normally, the overlay marks
106
are located on the scribe lines
104
at the four corners of the edge of each chip
102
to measure whether the photoresist pattern is aligned with the previous wafer layer in the fabrication process.
FIG. 2
is a cross-sectional view cutting along the line I-I′ of
FIG. 1. A
part of the structure of the overlay mark and the neighboring chip is shown. The overlay mark is applied to an interconnection fabrication process, which is further described as follows.
In
FIG. 2
, a metal layer
202
is formed in the substrate
200
. A dielectric layer
205
with a via hole
206
and a trench
207
therein is formed on the substrate
200
. The via hole
206
has a narrow width. A metal layer
204
is formed over the dielectric layer
205
to completely fill the via hole
206
, but to cover only a surface portion of the trench
207
. A chemical mechanical polishing process is performed to remove the metal layer
204
that is formed out of the via hole
206
and the trench
207
. The dielectric layer
205
is thus exposed that is the dielectric layer
205
is used as a stop layer to form a plug within the via hole
206
. A metal layer
208
is formed on the dielectric layer
205
to fill the trench
207
. Because the trench
207
is sufficiently wide, therefore, the metal layer
208
over the trench
207
has a recess
211
. Due to the recesses
211
on the metal layer
208
, scribe lines are formed on the metal layer
208
.
A number of processes such as photoresist coating, an exposed process and a photolithgraphic process are carried out to form a patterned photoresist layer
210
on the metal layer
208
. Therefore, a region for forming conductive wires in the metal layer
208
is exposed. A photoresist pattern
210
a
is formed between the scribe lines and is combined with the recess
211
as an overlay mark
212
for an accurate measurement.
FIG. 3
shows a top view of a conventional structure of an overlay mark.
Referring to
FIGS. 2 and 3
,
FIG. 3
is a top view of an overlay mark
212
formed by a combination of the recess
211
and the photoresist pattern
210
a
. A conventional overlay mark
212
includes an outer mark
302
and an inner mark
304
. The outer mark
302
comprises four recesses
211
as shown in
FIG. 2
, while the inner mark
304
comprises the photoresist patterns
210
a
that constructs another rectangle. The outer mark
302
embraces the inner mark
304
. The overlay mark
212
is located on the scribe lines at four corners of each chip to measure whether the photoresist pattern is precisely aligned with the previous layer.
FIG. 4
illustrates a cross section taken along a cutting line II-II′ of FIG.
3
.
Referring to
FIGS. 3 and 4
, the recesses
211
in
FIG. 4
correspond to the outer mark
302
in
FIG. 3
, and the photoresist pattern corresponds to the inner mark
304
.
FIG. 5
shows the signal waveform of the overlay mark as shown in FIG.
4
.
Referring to
FIGS. 4 and 5
, the peak signals of the recesses
211
in
FIG. 4
are denoted as
502
a
and
502
b
in
FIG. 5
, and the peak signals of the photoresist pattern
210
a
are denoted as
506
a
and
506
b
in FIG.
5
. Using the conventional overlay mark to measure the alignment accuracy, the peak signals
502
a
,
502
b
of the recesses are read first. A mean value
504
of the peak signals
502
a
and
502
b
is obtained. A mean value
508
of the peak signals
506
a
and
506
b
is then obtained after being read. The difference between the mean values
504
and
508
is calculated as the overlay error. If the overlay error is larger the acceptable deviation, the alignment between the photoresist pattern and the wafer does not reach the required accuracy. Consequently, the photoresist has to be removed, and the photolithography process has to be repeated until the overlay error is no larger than the acceptable error.
However, after chemical mechanical polishing, the quality of the conventional outer mark of the overlay mark is affected or even damaged due to the factors such as a polishing rate deviation, a slurry corrosion, a density of patterns on the wafer and the polishing deviation between the wafer center and edge. Further, the grain of the metal layer is an important factor for affecting on the accuracy of the overlay mark because if the size of the grain is too big, it will affect the measuring signal, leading to a poor measurement of signal profile of the peak signal is obtained. The measurement result is thus seriously affected because the distance between the outer marks
302
(that is, the recesses
211
) of the conventional overlay mark is too long. That is, because the distribution of the recesses
211
is too scattered, and because the scattered structure, the damage caused by chemical mechanical polishing is not withstood. The chemical mechanical polishing performed after formation of the metal via, especially the copper damascene, plays an important role for the subsequent process due to the integrity of the overlay mark. This is because the problems of stability, slurry anti-corrosion and diffusion cause a more serious effect to copper than other metal such as tungsten.
FIG. 6
shows the method for measuring the overlay error using the conventional overlay mark.
Referring to
FIG. 6
, while measuring the overlay error using the conventional overlay mark, the X-directional deviation is measured along a straight line
310
in X-direction of the overlay mark
212
. A Y-directional deviation is further measured along a straight line
312
in the Y-direction of the overlay mark
212
. When all the overlay marks
212
, which are being set in the scribe lines are measured using this method, whether the photoresist pattern and the previous wafer layer on the chip are precisely aligned can be calculated according to the X- and Y-directional deviations.
However, one conventional overlay mark
212
can only measure one X- and one Y-directional deviations. If the outer mark
302
is damaged during the chemical mechanical polishing process, the X- or Y-directional deviation cannot be measured, and the alignment accuracy cannot be obtained correctly.
SUMMARY OF THE INVENTION
The invention provides a structure and a fabrication method of an overlay mark. The probability of damaging the overlay mark by chemical mechanical polishing process is reduced.
The invention further provides an overlay mark structure, and the measure and analysis method thereof to enhance the accuracy for measuring the overlay error.
The structure of the overlay mark provided by the invention includes an outer mark and an inner mark. The outer mark encloses a closed cross area which comprises two central axes. The inner mark is made of four strip patterns arranged in the central axes and extends outwardly towards four directions from
Kuo Chi-Liang
Yu Cheng-Hung
Fulton Christopher W.
United Microelectronics Corp.
Wu Charles C. H.
Wu & Cheung, LLP
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