Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2001-11-13
2003-06-17
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S059000, C349S038000, C349S039000, C349S042000, C349S054000
Reexamination Certificate
active
06580093
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 90118123, filed Jul. 25, 2001.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a structure of a thin film transistor (TFT) array. More particularly, the present invention relates to a TFT array which has a dummy electrode connected to the last scanning line to compensate its capacitance. By the compensation of capacitance, the dummy electrode can get a balance in capacitance for the edge scanning line with the other usual scanning line.
2. Description of Related Art
Due to technologies of semiconductor fabrication and displaying device, the social environment with multimedia manner has also been greatly progressed. From the displaying device point of view, the cathode ray tube (CRT) has its economic advantages and has been widely used in the market of displaying device for the last years. However, if one considers the personal working environment associating with the terminal or display device, or looks at it from environment protection point of view which requires energy saving as a trend, the CRT has its issues about the size, weight, power consumption, and so on. So far, the CRT displaying device seems not able to solve those issues. Therefore, the TFT liquid crystal display (TFT-LCD) device with its advantages of high image quality, space utilizing efficiency, low power consumption, and no irradiation, has gradually been the new trend. The TFT-LCD generally uses liquid crystal that is filled between a substrate of TFT array and a color filter layer to form image pixels. In addition, an upper polarizer and a lower polarizer are formed as the outer layer, whereby an LCD panel is formed. Since the LCD panel by itself cannot produce light, a backlight module is incorporated with the LCD panel, so as to provide a light source for displaying image. The substrate of TFT array usually affects the displaying quality of the TFT-LCD device.
FIG. 1
is a drawing, illustrating the structure of TFT array for a conventional LCD device.
FIG. 2
is a cross-sectional view, illustrating the structure of TFT array with respect to FIG.
1
. The TFT array is formed on a substrate
100
. There are several scanning lines
102
a
,
102
b
,
102
c
. . . and several data lines
104
a
,
104
b
,
104
c
,
104
d
,
104
e
, and so on. The adjacent two scanning lines, such as scanning lines
102
a
,
102
b
and two adjacent data lines
104
a
,
104
b
form an image pixel region. Each pixel region incorporates a TFT
106
and a pixel electrode
108
with respect to the TFT
106
. Using the TFT
106
connected to the scanning line
102
a
as an example for descriptions, each of the TFT
106
has a gate electrode
106
a
, a source region
106
b
, and a drain region
106
c
. The gate electrode
106
a
of the TFT
106
is electrically connected to the scanning line
102
a
. The source region
106
b
of the TFT
106
is electrically connected to the data line
104
a
. The drain region
106
c
is electrically connected to the corresponding pixel electrode
108
. More over, the pixel electrode
108
covers not only the pixel region but also the adjacent scanning line
102
b
, so as to form a storage capacitor C
st
above the scanning line
102
b
. A similar capacitor C
st
is also formed at the other scanning line
102
c
but the scanning line
102
a
has no capacitor C
st
.
The scanning line
102
b
has the storage capacitor C
st
. In addition, edge of each pixel electrode
108
corresponding to the scanning line
102
b
is also couple to the scanning line
102
b
to form a parasitic capacitor C
gs
, and edge of the pixel electrode
108
is also coupled to the data line
104
b
to form a parasitic capacitor C
sig1
. The edge of the pixel electrode
108
is also coupled to the data line
104
a
to form a parasitic capacitor C
sig2
. Thus, the total capacitor C
total
on the scanning line
102
b
is the equivalent to the liquid crystal capacitor C
LC
, parasitic capacitors C
gs
, C
sig1
, C
sig2
, coupled in parallel and the storage capacitor C
st
, coupled in cascade.
When data are written into the TFT
106
on the scanning lines
102
a
,
102
b
,
102
c
, the scanning lines
102
a
,
102
b
,
102
c
are sequentially applied with a voltage, so as to set the TFT to a “ON” state under control of the scanning lines
102
a
,
102
b
,
102
c
. Then, the displaying information is written through the data lines
104
a
-
104
e
into the TFT
106
under control of the scanning lines
102
a
,
102
b
,
102
c
. However, during the data writing-in process, the scanning line
102
b
and the scanning line
102
c
(not the edge scanning line) are covered by the adjacent pixel electrode to form the storage capacitor C
st
and the liquid crystal capacitor C
LC
, but the edge scanning line
103
a
is not covered by any adjacent pixel electrode. As a result, the capacitive effect of the scanning line
102
a
is obviously different from that of the other scanning lines
102
b
,
102
c
. Due to this difference of capacitive effect between the scanning line
102
a
and the scanning lines
102
b
,
102
c
(not the edge scanning line), the driving condition on the scanning line
102
a
for the image pixels at the last row is not consistent with the other pixel rows.
FIG. 3A
is a circuit configuration, illustrating the capacitor coupling structure for the scanning line other than the edge scanning line associating with the conventional TFT array. In
FIG. 3A
, the total capacitor C
total
for the scanning line
102
a
and the scanning line
102
b
is equivalent to the liquid crystal capacitor C
LC
, parasitic capacitors C
gs
, C
sig1
, C
sig2
, coupled in parallel and the storage capacitor C
st
, coupled in cascade.
FIG. 3B
is a circuit configuration, illustrating the equivalent capacitor for the scanning line other than the edge scanning line, associating with the conventional TFT array. In
FIG. 3B
, since the parasitic capacitors C
gs
, C
sig1
, C
sig2
are much smaller than the liquid crystal capacitor C
LC
, the equivalent capacitor after coupling in parallel is about equal to the liquid crystal capacitor C
LC
. Consequently, the total equivalent capacitor C
total
is equal to the coupling of liquid crystal C
LC
with the storage capacitor C
st
in cascade. However, for the structure of the conventional TFT array, since the edge scanning line has not been covered by the adjacent pixel electrode, it has no capacitor of storage capacitor C
st
, parasitic capacitors C
gs
, C
sig1
, C
sig2
, and the liquid crystal C
LC
. Since the capacitive effect is consistent between the edge scanning line
102
a
and the other scanning lines
102
b
,
102
c
, it causes that the displaying condition for the last row of pixel is consistent with the other scanning lines.
SUMMARY OF THE INVENTION
It is an object that the invention provides a structure of the TFT array, which includes a pixel electrode with capacitance compensation formed on the edge scanning line, so as to balance the capacitive effect on the edge scanning line to the other scanning lines.
As embodied and broadly described herein, the invention provides a structure of the TFT array which includes an additional row of pixel electrode coupled to the last scanning line for the last pixel electrode row. The last pixel electrode row has overlap with the last scanning line to form the equivalent storage capacitor. In addition, the liquid crystal exists on a portion of the pixel electrode row without overlapping with the last scanning line, resulting in the liquid crystal capacitor, which equivalent to the liquid crystal capacitor for the other scanning lines. The pixel electrode row can compensate the miss capacitance from the storage capacitor and the liquid crystal capacitor for the last scanning line. As a result, the difference of capacitive effect for the edge scanning line and the other scanning lines can be balanced, so as to improve the displaying quality.
The invention provides another structure of the TFT array which includes
Chung Te-Cheng
Jen Tean-Sen
Lee Deuk-Su
Hannstar Display Corporation
J.C. Patents
Tran Minh Loan
LandOfFree
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