Structure of a split-gate memory cell

Details Structure of a split-gate memory cell Structure of a split-gate memory cell

2007-06-26

2007-06-26

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185280, C365S185290

Reexamination Certificate

active

11218214

ABSTRACT:
A split-gate memory cell includes a memory transistor and a select transistor. The memory transistor includes a drain, a source, a control gate and a floating gate. The select transistor includes a drain, a source and a select gate. The source of the select transistor is electrically connected to the drain of the memory transistor. The threshold state of the floating gate of the memory transistor determines the logic output of the memory cell. When the split-gate memory cell is erased or programmed a high voltage is only applied to the control gate and source of the memory transistor. As a result, no high voltage will be placed on any portion of the select transistor and the split-gate memory cell can achieve an increased cycling endurance.

REFERENCES:
patent: 4783766 (1988-11-01), Samachisa et al.
patent: 5471422 (1995-11-01), Chang et al.
patent: 6114724 (2000-09-01), Ratnakumar
patent: 6284601 (2001-09-01), Hoang

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