Structure of a floating gate of a MOS transistor and method...

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Utilizing three or more electrode solid-state device

Reexamination Certificate

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C365S185240

Reexamination Certificate

active

06342806

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor integrated circuit, and particularly to the economy of power consumption thereby.
2. Description of the Related Art
With miniaturization of a semiconductor devices, the need for a reduction in their source voltages has been increased in recent years. With a view toward obtaining a sufficient operating speed when the source is in a lowered state, there is a need to reduce a threshold voltage of each MOSFET which constitutes an internal circuit.
Even when a voltage for bringing each MOSFET low in threshold current to an OFF state is supplied to the gate thereof, a small leakage current will flow in the MOSFET according to the voltage applied between the source and drain thereof. The leakage current will increase power consumption even during standby or the like.
The following have heretofore been known as circuits for reducing power consumption of the semiconductor device.
According to one circuit, an internal circuit was made up of MOSFETs low in threshold voltage, and MOSFETs high in threshold voltage were respectively inserted between Vcc and virtual Vcc and GND and virtual GND. In such a construction, the MOSFETs high in threshold voltage, which have been inserted between Vcc and virtual Vcc and GND and virtual GND, were respectively brought to an off state upon a standby state of the semiconductor device. A leakage current developed between Vcc and GND has been cut by this operation.
According to another circuit, a substrate potential in an internal circuit was changed upon both its standby and operation so as to change a threshold voltage of each MOSFET itself.
However, the system for inserting the MOSFETs between Vcc and virtual Vcc and GND and virtual GND has encountered difficulties in ensuring the stability of internal data. Further, the system for changing the substrate potential had problems such as the occurrence of a latch-up phenomenon, etc.
SUMMARY OF THE INVENTION
With the foregoing problems in view, it is therefore an object of the present invention to provide a circuit low in power consumption and stable in operation, and a method of reducing power consumption of the circuit.
According to one aspect of the invention, for achieving the above object, there is provided a semiconductor integrated circuit, comprising a first capacitor having one electrode electrically connected to a control electrode of a transistor and the other electrode supplied with an input signal with respect to the transistor, and a second capacitor having one electrode electrically connected to the control electrode of the transistor and the other electrode supplied with a predetermined voltage thereby to change a threshold value of the transistor relative to the input signal.
According to another aspect of the invention, for achieving the above object, there is provided a method of economizing in power consumption of a semiconductor integrated circuit, comprising the following steps: supplying a first predetermined voltage to the other electrode of a first capacitor whose one electrode is connected to a control electrode of a transistor, upon normal operation of the semiconductor integrated circuit; supplying an input signal to the other electrode of a second capacitor whose one electrode is connected to a control electrode of the transistor; and supplying a second predetermined voltage to the other electrode of the first capacitor thereby to increase a threshold voltage of the transistor with respect to the input signal upon a standby state of the semiconductor integrated circuit.
Typical ones of various inventions of the present application have been shown in brief. However, the various inventions of the present application and specific configurations of these inventions will be understood from the following description.


REFERENCES:
patent: 5289401 (1994-02-01), Shima
patent: 5311470 (1994-05-01), Atsumi et al.
patent: 5329487 (1994-07-01), Gupta et al.

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