Structure of a bonding pad for semiconductor devices

Details Structure of a bonding pad for semiconductor devices Structure of a bonding pad for semiconductor devices

1998-08-19

2000-08-08

Tran, Minh Loan

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

257753, 257758, 257765, H01L 2900, H01L 2348

Patent

active

061005738

ABSTRACT:
The invention provides a structure of a bonding pad, which comprising: a substrate; a dielectric layer formed over the substrate; a first metal layer formed in the dielectric layer; a second metal layer formed in the dielectric layer and above the first metal layer; a plurality of first plugs formed between the first metal layer and the second metal layer, wherein the plugs are used for connecting the first metal layer with the second metal layer; a third metal layer formed over the dielectric layer; and a plurality of second plugs, formed between the second metal layer and the third metal layer, wherein the second plugs are used for connecting the second metal layer with the third metal layer.

REFERENCES:
patent: 5847466 (1998-12-01), Ito et al.
patent: 5923088 (1999-07-01), Shiue et al.

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