Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2001-03-14
2003-06-17
Niebling, John F. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257S623000, C257S626000
Reexamination Certificate
active
06580153
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to wafer singulation. More particularly, the present invention relates to a structure for protection of electronic components during wafer singulation.
2. Description of the Related Art
A number of electronic components chips (hereinafter “chips”) are batch processed as an array on a wafer. The wafer is then cut to singulate the wafer and to separate the chips.
For certain applications, the front-side surface of a chip, e.g., a micromachine chip, has formed on it an active area. Illustratively, the active area includes various types of special-purpose devices, such as, for example, micromachines. It is important that the active area not be contacted and contaminated with silicon shards, particulates, or water from the singulation process. Otherwise, the active area is damaged or destroyed. Consequently, the active area must be protected from undesired contamination or contact during the wafer singulation process.
One prior art technique disclosed in Roberts Jr., et al., U.S. Pat. No. 5,362,681, which is herein incorporated by reference in its entirety, uses two separate layers of tape for protecting the active area of a chip during wafer singulation.
Initially, precisely positioned, spaced-apart holes are mechanically punched into the first layer of tape. The punched holes in the first layer are precisely aligned over the active areas on the front-side surface of the wafer and the first layer is attached to the front-side surface of the wafer.
The second layer of tape is then attached to the first layer sealing the punched holes and forming cavities over the active areas. In this manner, the two layers of tape protect the active areas. The wafer is then singulated from the back-side surface of the wafer.
It should be readily apparent that mechanically punching the holes in the first layer, precisely aligning the holes over the active areas on the front-side surface of the wafer, attaching the first layer to the front-side surface of the wafer, and attaching the second layer to the first layer to seal the holes is relatively expensive and complex. Consequently, a need exists for a simple, economical technique for protecting active areas on the front-side surface of a wafer from contaminants during singulation of the wafer.
SUMMARY OF THE INVENTION
In accordance with the present invention, a protective layer includes a polymerized region, which forms a cavity in an interior surface of the protective layer. The protective layer is mounted to a micromachine chip such that an active area of the micromachine chip is located within the cavity of the protective layer. The protective layer protects the active area during front-side or back-side singulation of the micromachine chip from a micromachine substrate.
Advantageously, the prior art requirement of mechanically punching holes in a first layer, precisely aligning the holes over active areas on a front-side surface of a wafer, attaching the first layer to the front-side surface of the wafer, and attaching a second layer to the first layer to seal the holes is eliminated. Accordingly, processing of micromachine chips in accordance with the present invention is less complex, less labor intensive and thus less expensive than fabrication of micromachine chips in the prior art.
These and other features and advantages of the present invention will be more readily apparent from the detailed description set forth below taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 5362681 (1994-11-01), Roberts, Jr. et al.
patent: 5527744 (1996-06-01), Mignardi et al.
patent: 5832585 (1998-11-01), Takiar et al.
patent: 6235141 (2001-05-01), Feldman et al.
patent: 6245593 (2001-06-01), Yoshihara et al.
patent: 2001/0019765 (2001-09-01), Kinchi et al.
patent: 2119505 (1995-03-01), None
patent: 63-43342 (1988-02-01), None
patent: 63-43988 (1988-02-01), None
Encyclopedia of Polymer Science and Engineering, vol. 6, p. 112.*
Lucey, Michael F., “UV Curable Coatings for Electronic Components”, IEEE Transactions on Components, Packaging and Manufacturing Technology-Part A vol. 17 No. 3, Sep. 1994, pp. 326-332.
WEB page Article, Nitto Denko America, Inc., “Answering the Sophisticated Demands of the Semiconductor Manufacturing Process,” copyright 1995-1999, 1 page.
Glenn Thomas P.
Hollaway Roy Dale
Webster Steven
Amkor Technology Inc.
Dickey Thomas L.
Gunnison McKay & Hodgson, L.L.P.
Hodgson Serge J.
Niebling John F.
LandOfFree
Structure for protecting a micromachine with a cavity in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Structure for protecting a micromachine with a cavity in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Structure for protecting a micromachine with a cavity in a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3135880