Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-06-05
2001-10-30
Gaffin, Jeffrey (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C361S767000
Reexamination Certificate
active
06310303
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a structure for printed circuit design and, more specifically to a substrate structure for surface mounted components or devices which eliminates or substantially reduces the need for vias directly beneath the surface mounting site.
Array surface mounted devices such as ball grid array packages (BGAs, PBGAs, CBGAs, TBGAs, etc.), chip scale packages (CSPs), and direct chip attach (flip chips) are being used to achieve better performance in system miniaturization. However, these types of devices have large numbers of contacts or balls for contacting conductive pads of a substrate, and each pad must be routed for interconnection with various components and test point vias. As shown in
FIG. 1
, this routing adds to the layer count of the substrate, and further requires a potentially large number of vias underneath the package.
This conventional routing and via configuration adds to manufacturing costs, and further provides for additional connections which are subject to potential failure such as during the manufacturing process.
The need remains for a cost-effective and reliable method for connecting array surface mounted devices to substrates.
It is therefore the primary object of the present invention to provide a substrate structure for mounting array surface mounted devices wherein vias directly beneath the device are reduced or eliminated.
It is a further object of the present invention to provide a substrate structure for surface mounting such devices which results in a reduction in the number of layers as compared to conventional dielectric substrate constructions.
It is still another object of the present invention to provide a substrate structure as described above which is less expensive and more reliable.
It is a still further object of the present invention to provide a substrate structure having improved solder joint reliability.
It is another object of the present invention to provide a substrate structure wherein single substrate layers can be defined as ground planes, voltage planes and the like.
Other objects and advantages of the present invention will appear hereinbelow.
SUMMARY OF THE INVENTION
In accordance with the present invention, the foregoing objects and advantages have been readily attained.
In accordance with the invention, a substrate structure is provided which uses a plurality of dielectric layers having at least one dielectric layer positioned over a base layer or PCB to form a substrate structure wherein each layer has a cutout increasing in size away from the base layer. This defines a mounting site wherein a portion of pads are located on each layer, and a portion on the base layer, with corresponding traces provided on the respective layer. In this manner, a mounting site may be provided with routing for a large number of pads which eliminates or at least substantially reduces the need for vias underneath the package or device mounting site.
In accordance with a particular embodiment of the present invention, instead of an entire cutout, intermediate and outer layers are provided with access holes positioned over pads or conductive elements of underlying layers. This is particularly advantageous by providing additional surface area on each layer which can be used for printing traces and the like.
In accordance with still another particular embodiment of the present invention, a matching number of holes is provided on each layer with corresponding conductive pads positioned on the base layer and conductive elements positioned in desired patterns on intermediate and outer layers. In this embodiment, solder balls are used to secure a device to the site, and when the solder balls melt, there will be contact to any intermediate and outer layers as well as solder ball pads on the base layer by extending through the clearance hole vias on each layer, the solder connections include increased height solder ball joints, forming a pillar inside the clearance hole vias, which increases the reliability of the solder joints. In this embodiment, in addition to reducing board layer count and board costs as discussed earlier, an added benefit is provided based upon improved solder joint reliability.
According to the invention, a substrate structure for surface mount devices is provided which substrate structure comprises: a plurality of substrate layers including at least a base layer and an outer layer; said base layer having a contact surface and a first array of conductive elements on said contact surface; said outer layer having a contact surface, a second array of conductive elements on said contact surface, and at least one access passing through said outer layer; and said outer layer being mounted to said base layer with said access positioned over said first array, wherein said first array and said second array define in combination a device mounting site.
In accordance with an additional embodiment of the present invention, a substrate structure for surface mount devices is provided, which substrate structure comprises: a base layer having a contact surface and a first array of conductive elements on said contact surface; and at least one additional layer each having a contact surface, access and a further array of conductive elements on said contact surface, said at least one additional layer being positioned substantially adjacent to said base layer such that said first array and said further array of each additional layer define in combination a package mounting site.
In accordance with still another aspect of the present invention, a printed circuit structure is provided, which structure comprises: a surface mount device having a mounting surface and a plurality of conductive members disposed on said mounting surface; and a substrate structure for mounting said package, comprising a plurality of substrate layers including at least a base layer and an outer layer; said base layer having a contact surface and a first array of conductive elements on said contact surface; said outer layer having a contact surface, an access and a second array of conductive pads on said contact surface; and said outer layer being mounted to said base layer with said cutout positioned over said first array, said first array and said second array defining in combination a package mounting site; said surface mount device being connected to said mounting site with said conductive members connected to said first array and said second array.
The routing architecture and substrate structure of the present invention may suitably be used to provide mounting sites for packages or devices on either the primary or secondary side of the printed circuit structure or PCB, or on both sides, as desired.
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patent
Luvara John J.
Prasad Ray
Quigley, Jr. John J.
Bachman & LaPointe P.C.
Gaffin Jeffrey
Norris Jeremy
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