Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation
Reexamination Certificate
2000-09-19
2002-01-15
Meier, Stephen D. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Electromagnetic or particle radiation
C257S257000, C257S692000, C257S693000
Reexamination Certificate
active
06339247
ABSTRACT:
TECHNICAL FIELD
This invention relates to a structure for mounting a semiconductor device for driving a liquid crystal display device on a substrate of the liquid crystal display device for electrical and mechanical connection therebetween, and the semiconductor device for implementing such a structure, particularly, to a surface-mounting type semiconductor device provided with bumps (protruded electrodes) for electrical connection with the liquid crystal display device.
BACKGROUND TECHNOLOGY
Surface-mounting type semiconductor devices have come into widespread use as a semiconductor device making up an integrated circuit (IC), a large scale integrated circuit (LSI), and so forth.
Among the surface-mounting type semiconductor devices, there is one type provided with a multitude of bumps placed in lines on the upper surface thereof for electrical and mechanical connection with a wiring pattern on a circuit board when mounting the same on the circuit board.
FIG. 15
shows the cross-sectional construction of a semiconductor device provided with bumps formed in a straight-wall shape by way of example.
With this semiconductor device, a multitude of electrode pads
74
for connection with an external circuit are provided along side edges of a semiconductor chip
72
, running in a direction orthogonal to the plane of the figure, on the surface (the upper face in the figure) of the semiconductor chip
72
with an integrated circuit (not shown) formed thereon. In
FIG. 15
, only one of a plurality of the electrode pads
74
,
74
, disposed in respective lines along the side edge on both sides of the semiconductor chip
72
, is shown.
An insulating film
76
having openings formed in such a way as to cover a peripheral region of the respective electrode pads
74
, and to mexpose the inside of the respective peripheral regions is provided on the entire upper surface of the semiconductor chip
72
, and a lower electrode
79
is provided so as to be in intimate contact with the peripheral region of the respective openings of the insulating film
76
, and an exposed part of the respective electrode pads
74
. Further, on top of the respective lower electrodes
79
, bumps
78
formed in a straight-wall shape are provided.
Thus, the semiconductor device is provided with the bumps
78
formed in a straight-wall shape. In contrast, there is another type of semiconductor device provided with bumps formed in a mushroom shape, wherein the top part of the bumps is larger than the base thereof. However, the semiconductor device provided with the bumps formed in a straight-wall shape is more suitable for reducing lateral spread thereof, along a semiconductor substrate
72
, and to that extent, a placement density of the bumps can be rendered higher, so that a connection pitch with the external circuit can be miniaturized.
Such surface-mounting semiconductor devices provided with the bumps as described have come to be used as semiconductor devices for driving a liquid crystal display device, and a plurality of such semiconductor devices for use in driving (scanning and inputting signals) have come to be mounted on a peripheral region of a glass substrate making up a liquid crystal panel of the liquid crystal display device.
Accordingly, a conventional structure for mounting a semiconductor device on such a liquid crystal display device is described hereinafter with reference to
FIG. 16
by way of example.
Reference numeral
80
denotes a liquid crystal display device wherein liquid crystal
85
is sealed in-between a first substrate
81
and a second substrate
82
, making up a liquid crystal panel, by use of a sealing material
86
, and a region
8
of the first substrate
81
where the first substrate
81
is extended beyond an edge of the second substrate
82
is a region where a semiconductor device
71
for driving the liquid crystal display device
80
is mounted. For the first and second substrates
81
,
82
, respectively, a glass substrate is generally used, however, a transparent resin substrate, or the like may be used as well.
A multitude of scanning electrodes
83
extending to the region
8
from the interior of the liquid crystal display panel with the liquid crystal
85
sealed therein, and a multitude of terminal electrodes
88
serving as connecting terminals to the external circuit are composed of a transparent and electrically conductive film, and are patterned on the upper surface of the first substrate
81
in such a way as to be placed in lines across the direction orthogonal to the plane of the figure. A multitude of signal electrodes
84
are composed of a transparent and electrically conductive film, and are patterned on the inner surface of the second substrate
82
, opposite to the scanning electrodes
83
across the liquid crystal
85
, in such a way as to be placed in lines across the transverse direction in the figure.
An anisotropic conductive adhesive
50
composed of electrically conductive particles
52
dispersed in an insulating adhesive is applied onto the region
8
of the first substrate
81
of the liquid crystal display panel
80
. Then, the semiconductor device
71
in a posture inverted from that shown in
FIG. 15
is disposed on the region
8
of the first substrate
81
after alignment of the respective bumps
78
with the respective scanning electrodes
83
and the respective terminal electrodes
88
that are to be connected with the respective bumps
78
.
With the semiconductor device
71
being set on the first substrate
81
with the anisotropic conductive adhesive
50
applied thereon as described above, pressure is applied to the semiconductor device
71
against the first substrate
81
, and at the same time, heat treatment is applied thereto, thereby electrically connecting the respective bumps
78
with the respective scanning electrodes
83
and the respective terminal electrodes
88
through the intermediary of the electrically conductive particles
52
contained in the anisotropic conductive adhesive
50
. Concurrently, the semiconductor device
71
is bonded to, and securely mounted on the first substrate
81
by the insulating adhesive contained in the anisotropic conductive adhesive
50
.
Further, an end of a flexible printed circuit board (FPC)
60
is disposed on a part of the upper surface of the first substrate
81
where the terminal electrodes
88
are formed. A wiring pattern (not shown) composed of a copper foil, for providing the semiconductor device
71
with a power supply source and input signals, is formed on the FPC
60
.
The wiring pattern is also electrically connected with the respective terminal electrodes
88
on the first substrate
81
through the intermediary of the electrically conductive particles
52
contained in the anisotropic conductive adhesive
50
, and at the same time, the end of the FPC
60
is bonded to, and securely mounted on the first substrate
81
.
By mounting the semiconductor device
71
in the manner as described above, the electrically conductive particles
52
contained in the anisotropic conductive adhesive
50
are securely held between the respective bumps
78
and the respective scanning electrodes
83
on the first substrate
81
as well as between the wiring pattern on the FPC
60
and the respective terminal electrodes
88
on the first substrate
81
, thereby attaining electrical connection, respectively, and also attaining mechanical connection therebetween, respectively, by the insulating adhesive.
Thereafter, a mold resin
62
is applied to the upper surface of junctions for both the semiconductor device
71
and the FPC
60
, as well as peripheral regions thereof. This can prevent moisture from ingressing into junctions between the respective bumps
78
and the respective scanning electrodes
83
as well as junctions between the FPC
60
and the respective terminal electrodes
88
while providing these junctions with mechanical protection, so that reliability of the structure for mounting the semiconductor device can be enhanced.
However, a problem has been encountered with such a c
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