Active solid-state devices (e.g. – transistors – solid-state diode – Specified wide band gap semiconductor material other than... – Diamond or silicon carbide
Reexamination Certificate
1997-02-07
2001-01-30
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Specified wide band gap semiconductor material other than...
Diamond or silicon carbide
C257S330000, C257S329000
Reexamination Certificate
active
06180958
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to insulated gate power semiconductor devices and in particular relates to UMOS and IGBT field effect transistors formed in silicon carbide.
BACKGROUND OF THE INVENTION
The present invention relates to power semiconductor devices and particularly power MOSFETs (metal-oxide-semiconductor field-effect transistors) formed in silicon carbide. A power MOSFET is a small, reliable, electronically controllable switching device that has growing application in high voltage/high power devices and integrated circuits. Power MOSFETs have a variety of applications in numerous fields including communications, consumer applications, data processing, military, industrial, automotive and related markets. In particular, power MOSFETs have inherently higher switching speeds than bipolar transistors and are accordingly particularly useful in high frequency applications.
Although silicon has been the material of choice for many semiconductor applications, its fundamental electronic structure and characteristics prevent its utilization beyond certain parameters. Thus, interest for power MOSFET devices has turned from silicon to other materials, including silicon carbide.
Silicon carbide has a number of intrinsic advantages for power MOSFET applications. Silicon carbide has a high field saturation velocity which is three times larger than that of gallium arsenide (GaAs). Silicon carbide has a high intrinsic breakdown field ten times higher than gallium arsenide and a thermal conductivity ten times as high as gallium arsenide.
SiC is unique among compound semiconductors in that its native oxide is SiO
2
, the same oxide as silicon. This means that the workhorse power devices used in silicon, i.e. the power MOSFET, insulated gate bipolar transistor (IGBT), and MOS-controlled thyristor (MCT) can all be fabricated in SiC. Because of technological differences, however, power devices in SiC can be very different from silicon devices, and a direct translation of silicon concepts to SiC is not always possible. SiC has a breakdown field eight times higher than silicon, and SiC power devices can have specific on-resistances 100 to 200 times lower than similar devices in silicon. Nevertheless, several practical problems must be addressed before such devices can be realized. Bipolar devices in SiC (e.g., the IGBT and MCT) suffer from short minority carrier lifetimes, which are typically in the range of 40 to 400 nanoseconds (ns). As a result, the highest current gains yet reported in SiC bipolar transistors are in the range of 10 to 12.
Because the peak electric field can be eight times (8×) higher than in silicon, SiC switching devices can be fabricated with a drift region about 8× thinner than comparable silicon devices. If the drift region is 8× thinner, the doping of the drift region can be about twelve times (12×) higher. The resistance of the drift region is proportional to the thickness and inversely proportional to the doping, so the specific on-resistance of a SiC device can be from 100-200 times smaller than a comparable silicon device of equal voltage rating. This means the SiC device can be 100-200 times smaller than the comparable silicon device. Alternatively, if the SiC device has the same area as the comparable silicon device, its specific on-resistance will be 100-200 times lower.
Although it offers substantial advantages over silicon, SiC is still relatively immature as a semiconductor material. Single crystal wafers of SiC have only been commercially available since 1991, and a number of technical problems need to be addressed before SiC can supplant silicon in power device applications. The main problems are related to crystal growth of SiC materials. Because of the very high melting point, single crystal boules cannot be pulled from a melt as in the Czochralski method used for silicon. Instead, the boule is grown on a seed crystal by a high temperature sublimation process. At present, the boules grown by the sublimation process are about 2 inches in diameter, much smaller than the 6 to 8 inches common in the silicon industry. In addition, the material still has a relatively large number of defects. These defects include micropipes; i.e. micron-size holes which run completely through the wafer. Fortunately, the micropipe problem appears to be under control, with micropipe densities as low as 27 cm
−2
in the most recent wafers, and at the current rate of improvement micropipes should eventually be completely eliminated.
SiC crystallizes in the hexagonal lattice with alternating planes of silicon and carbon atoms. The Si—C plane-pairs can occur in three orientations, labeled A, B, and C. The particular stacking sequence of Si—C plane-pairs identifies the polytype of the crystal. SiC occurs in a variety of polytypes, but the most common are 3C, 4H, and 6H. At the present time, the 6H polytype is the most thoroughly characterized, but the 4H polytype is more attractive for power devices because of its higher electron mobility.
Although it has a much higher breakdown field than silicon, SiC has lower hole and electron mobilities and shorter minority carrier lifetimes. The shorter lifetimes allow bipolar devices in SiC to switch much faster than comparable silicon devices, but they limit the current gain of SiC bipolar transistors to very low values, typically less than 20. For high-speed switching with low forward voltage drop, the best SiC device will be a power MOSFET.
The typical power MOSFET in silicon is a DMOS (or doubly-diffused MOS) structure. The short channel length is achieved by diffusing the p-type base layer and the n+ source through the same oxide window, thus removing any dependence on alignment of photomasks. The p-type base must have a sufficient number of dopant atoms per unit area (thickness times concentration) to prevent punch-through by the drain electric field in the blocking state. Unfortunately, the DMOS concept is difficult to translate to SiC because it is not feasible to thermally diffuse dopant atoms in SiC. One might artificially construct a similar structure using ion implantation, but the channel length would then be defined by a mask alignment, and it would be difficult to implant the p-type impurity to sufficient depth to prevent punch-through. For these reasons, a vertical UMOSFET structure—i.e. a combination of SiC epitaxial layers and a trench—is the most practical in SiC.
The theoretical potential for SiC MOSFETs has not been reached, however, because the maximum voltage in silicon carbide MOSFETs is instead limited by the breakdown field of the silicon dioxide (SiO
2
) insulator. Although this oxide does not actually fail until fields of about 10
7
volts per centimeter (V/cm) are reached, from a practical standpoint the low-term reliability of the oxide degrades severely under fields above about 2−3×10
6
V/cm. Such a field limitation is already slightly lower than the breakdown field of silicon carbide. Even more problematic, however, because of the 2.5:1 ratio of the dielectric constants of silicon dioxide and silicon carbide, Gauss' law requires that the maximum field in the silicon carbide portion of a device be limited to around 1×10
6
V/cm. As a result, silicon carbide power transistors are in practical terms limited to a blocking voltage much lower than that of which silicon carbide is theoretically capable.
Accordingly, the need exists for power transistors, particularly power MOSFETs, in silicon carbide that are capable of taking greater advantage of silicon carbide's favorable intrinsic properties, and it is an object of the invention to provide such transistors.
SUMMARY OF THE INVENTION
The invention meets this object with a silicon carbide insulated gate power transistor that demonstrates increased maximum voltage. The transistor comprises an opposite conductivity-type region adjacent the insulated gate for protecting the gate insulator material from the degrading or breakdown effects of a large voltage applied across the device
Nadav Ori
Summa, P.A. Philip
Thomas Tom
LandOfFree
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