Chemistry: electrical and wave energy – Apparatus – Electrolytic
Patent
1993-02-03
1994-08-30
Valentine, Donald R.
Chemistry: electrical and wave energy
Apparatus
Electrolytic
204297W, 204297M, C25D 1708
Patent
active
053424956
ABSTRACT:
A method of forming conductive bumps on the bond pads of one or more ICs is described wherein a barrier metal layer such as TiW is first formed over the bond pads in order to passivate the surface of the one or more ICs, an electroplatable base comprising an adhesion metal layer is then formed over each of the bond pads by using a contact metal mask to screen off other portions of the IC surfaces, and a conductive bump is then formed on top of the electroplatable base by either electroplating or electroless bath techniques. A structure for holding a plurality of good IC dies while conductive bumps are being electroplated on their bond pads is also described.
REFERENCES:
patent: 3536594 (1970-10-01), Pritchard
patent: 3625837 (1971-12-01), Nelson et al.
patent: 4561960 (1985-12-01), Jeannot et al.
patent: 4752371 (1988-06-01), Kriesel et al.
patent: 5024746 (1991-06-01), Stierman et al.
patent: 5171712 (1992-12-01), Wang et al.
Jacobs, S. L., et al., "A Multi-Chip Technology on a Stretched Polyimide Film," Polylithics, Inc., Proceedings, NEPCON West 1990, Anaheim, Calif., pp. 984-993, Feb. 26-31, 1990.
Johnson, T. K., "The Flexible Leaded Component (FLC): Reliable `Bare-Chip` Packaging," UniStructure, Inc., 9th Annual IEPS Conference, San Diego, Calif., pp. 742-753, Sep. 11-Sep. 13, 1989.
Liu, T. S., et al., "A Review of Wafer Bumping for Tape Automated Bonding," Solid State Technology, Mar. 1980.
Hatada, Kenzo, et al., "Bump Property for High Bondability and Reliability in Transferred Bump Tab Assembly Technology," IMC 1988 Proceedings, Tokyo, May 25-27, 1988.
Okumoto Victor H.
Tung Francisca
Valentine Donald R.
VLSI Technology Inc.
LandOfFree
Structure for holding integrated circuit dies to be electroplate does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Structure for holding integrated circuit dies to be electroplate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Structure for holding integrated circuit dies to be electroplate will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-27718