Structure for dynamic latch state saving device and protocol

Details Structure for dynamic latch state saving device and protocol Structure for dynamic latch state saving device and protocol

2011-06-21

2011-06-21

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

C716S111000, C716S119000, C716S126000, C716S127000, C716S133000, C327S199000, C327S202000, C327S203000, C327S204000, C365S154000

Reexamination Certificate

active

07966589

ABSTRACT:
The invention comprises a design structure for a dynamic voltage state-saving latch electrical circuit comprising a charge device adapted as a storage element, an integrated recovery mechanism, a supply voltage rail connected to the charge device, a hold signal allocated to the integrated recovery mechanism, a data signal input allocated to said charge device, a data signal output distributed from the charge device, and a clock signal allotted to the charge device, wherein said integrated recovery mechanism maintains a state of the charge device independent of the charge device.

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