Electrical computers and digital processing systems: multicomput – Miscellaneous
Reexamination Certificate
2008-06-18
2010-12-14
Etienne, Ario (Department: 2457)
Electrical computers and digital processing systems: multicomput
Miscellaneous
C709S222000, C710S311000
Reexamination Certificate
active
07853638
ABSTRACT:
A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for addressing deficiencies of the art in respect to hypertransport-based switching for multi-CPU systems and for flexibly configurable multi-CPU supported hypertransport switching is provided. The design structure can include a hypertransport switching data processing system. The system can include a CPU and at least two I/O bridges. Each I/O bridge can provide a communications path for data driven to a corresponding peripheral device from the CPU. Notably, the system can include a flexibly configurable hypertransport switch. The switch can include a first configuration adapting the CPU to both of the I/O bridges, and a second configuration adapting the CPU to a first one of the I/O bridges and a second CPU to a second one of the I/O bridges.
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U.S. Appl. No. 11/627,514, filed Jan. 26, 2007, entitled, Flexibly Configurable Multi Central Processing Unit (CPU) Supported Hypertransport Switching.
Hurlimann Daniel E.
Lu Vinh B.
Mueller Mark W.
Watson Kirby L.
Wilson Lee H.
Etienne Ario
International Business Machines - Corporation
Patterson & Sheridan LLP
Sall El Hadji
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