Structure comprising an interlayer of palladium and/or...

Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board

Reexamination Certificate

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Details

C427S097900, C438S633000, C438S643000, C438S653000, C438S675000, C438S687000, C438S680000, C204S192100, C204S192150

Reexamination Certificate

active

06911229

ABSTRACT:
An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; a barrier layer located in the via opening; an interlayer of palladium and/or platinum on the barrier layer; and a layer of copper or copper alloy on the interlayer is provided.

REFERENCES:
patent: 6136693 (2000-10-01), Chan et al.
patent: 6204204 (2001-03-01), Paranjpe et al.
patent: 6251781 (2001-06-01), Zhou et al.
patent: 6294836 (2001-09-01), Paranjpe et al.
patent: 6362099 (2002-03-01), Gandikota et al.
patent: 6495200 (2002-12-01), Chan et al.

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