Structure capable of reducing the amount of transferred...

Details Structure capable of reducing the amount of transferred... Structure capable of reducing the amount of transferred...

2006-04-18

2006-04-18

Do, Anh Hong (Department: 2627)

Image analysis

Image sensing

Multiple scanning

C382S319000, C382S232000, C382S233000

Reexamination Certificate

active

07031557

ABSTRACT:
A structure capable of reducing the amount of transferred digital image data of a digital display has a digital image and timing control unit for controlling the receiving and transfer of image data and providing timing control. The digital image and timing control unit includes at least one first and second registers, a data address flag unit, and a control logic. The first and second registers serves to buffer the image data of the n-th image data line and (n+1)-th image data line. The control logic compares the image data and enables the flags in the data address flag unit corresponding to the image position to be updated, so as to determine the image data to be transferred.

REFERENCES:
patent: 6061083 (2000-05-01), Aritake et al.
patent: 408110944 (1996-04-01), None
patent: 408179754 (1996-07-01), None
Hosotani et al., “A Display Processor Conforming to all DTV Formats with 188-TAP FIR Filters and 284Kb FIFO Memories”, IEEE, vol. 43, No. 3, Aug. 1997, pps. 837-847.

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