Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
2001-02-15
2003-04-15
Dudek, James (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
Reexamination Certificate
active
06549250
ABSTRACT:
FIELD OF THE INVENTION
The present invention in general relates to a structure that prevents a semiconductor integrated circuit from being damaged due to static electricity (hereafter, a structure for preventing damage caused by static electricity). More particularly this invention relates to a structure for preventing damage caused by static electricity relating to a semiconductor integrated circuit formed on a glass substrate or the like, such as drive circuit integrated type active matrix liquid crystal display device formed by using a polysilicon thin film transistor.
BACKGROUND OF THE INVENTION
These days, in order to lower the cost of the liquid crystal display device, a technology of forming a polysilicon thin film transistor on a glass substrate in low temperature process is drawing attention. According to this technology, together with the liquid crystal display panel, peripheral circuits such as driver circuit can be incorporated in the glass substrate. As a result, the driving IC which was used conventionally is not required, and hence the cost is lowered. However, when forming a driver circuit on the glass substrate by using a thin film transistor, it is needed to protect the driver circuit from static electricity incidentally occurring at the processing step or assembling step.
FIG. 1
to
FIG. 3
are drawings showing essential parts of a conventional structure that prevents damage due to static electricity. A structure that prevents damage of the driver circuit formed on a glass substrate is as shown in FIG.
1
. Terminal electrodes
12
a,
12
b,
12
c,
and
12
d
are connected to the not shown driver circuit with signal wires
11
a,
11
b,
11
c,
and
11
d
, respectively. Further, the terminal electrodes
12
a
,
12
b
,
12
c
, and
12
d
are connected to each other through end resistors
13
a,
13
b
,
13
c
, and
13
d.
Sometimes, as shown in
FIG. 2
, diodes
14
a
,
14
b
,
14
c
, and
14
d
are disposed near the terminal electrodes
12
a
,
12
c
,
12
c,
and
12
d
. Or, sometimes, as shown in
FIG. 3
, a diode
17
is disposed between a power source terminal
15
and a ground terminal
16
in the driver circuit. In the driving circuit integrated type active matrix liquid crystal display device, these diodes
14
a,
14
b
,
14
c
,
14
d
, and
17
are formed of, an N-type polysilicon thin film transistor
18
as shown in
FIG. 4
, or P-type polysilicon thin film transistor
19
as shown in FIG.
5
.
However, only by connecting the terminal electrodes
12
a
,
12
b
,
12
c
, and
12
d
mutually through end resistances 13a,
13
b
,
13
c
, and
13
d
, it is difficult to prevent damage of the driver circuit caused by the static electricity. The withstand voltage of the polysilicon thin film transistor is about 30 V, and the polysilicon thin film transistor itself does not withstand static electricity. Accordingly, if the diodes
14
a
,
14
b
,
14
c
,
14
d
, and
17
are formed by using thin film transistors, once the diodes
14
a
,
14
b
,
14
c
,
14
d
, and
17
are damaged caused by the static electricity in the course of processing or assembling, sufficient electrostatic damage preventive function is not obtained in the subsequent process.
In addition to the damage due to static electricity applied from the terminal electrodes stated above, electrostatic damage may be also induced by peel charging.
FIG. 6
is a signal wire layout for explaining electrostatic damage due to peel charging.
FIG. 7
is an equivalent circuit diagram at the time of application of static electricity in this signal wire layout.
In the example shown in
FIG. 6
, a multi-layer wiring structure is employed. Signal wires
11
a
to
11
d
connected respectively to the first to fourth terminal electrodes
12
a
to
12
d
are formed in a second wiring layer
22
. Of them, the signal wires
11
b
,
11
c,
and
11
d
are connected to signal wires
11
e
,
11
f
, and
11
g
formed in a first wiring layer
21
respectively through a contact portion
23
. The signal wires
11
e
,
11
f
, and
11
g
cross beneath the signal wire
11
a
, that is, they are intersecting.
That is, when the signal wires intersect, one signal wire at the intersection is formed in the first wiring layer
21
. The other signal wire is formed in the second wiring layer
22
. Usually, a gate wiring is formed in the first wiring layer
21
, and a data wiring is formed in the second wiring layer
22
.
In such layout, if peel charging occurs and static electricity is applied, as shown in
FIG. 7
, charge Q
1
and Q
2
are generated between a substrate conveying system
24
and signal wire
11
a,
and the substrate conveying system
24
and signal wires
11
b,
11
c,
and
11
d,
respectively, by way of the glass substrate acting as a dielectric (capacitance: Cd
1
, Cd
2
). At this time, since the glass substrate is very thin, for example, 0.7 mm, the values of Cd
1
and Cd
2
are very small. Accordingly, base on equation of V=Q/C, if peel charging occurs, V
1
and V
2
are about 1000 to 2000 V (volt), and the potential difference of V
1
and V
2
may be more than 100 V.
The withstand voltage of the interlayer insulating film interposed between the first wiring layer
21
and second wiring layer
22
shown in
FIG. 6
is about 30 to 60 V. Therefore, a voltage of 100V is applied to the intersection of the signal wires
11
e,
11
f,
and
11
g
formed in the first wiring layer
21
and the signal wire
11
a
formed in the second wiring layer
22
, an electrostatic damage takes place. That is, hitherto, electrostatic damage was easily induced by peel charging.
In
FIG. 7
, meanwhile, Vin
1
and Vin
2
are terminal electrodes, and Vout
1
and Vout
2
are nodes at the intersection. Reference numeral C
12
is a capacitance of the interlayer insulating film, and Rc is a resistance due to the contact portion
23
.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a structure that prevents a semiconductor integrated circuit, which circuit is formed on a glass substrate or the like, to be damaged due to static electricity.
According to the structure of one aspect of the present invention, along a signal wire electrically connecting between a position estimated to generate static electricity and a position to be protected from static electricity, an auxiliary conductor is formed in a wiring layer beneath this signal wire. Accordingly, even if a voltage of 1000 to 2000 V is generated between the substrate conveying system and the auxiliary conductor due to static electricity, peel charging or the like, the voltage generated between the auxiliary conductor and signal wire may be suppressed to several volts only. Since the withstand voltage of the interlayer insulating film between the wiring layer forming the auxiliary conductor and the wiring layer forming the signal wire is about 30 to 60 V, electrostatic damage of the interlayer insulating film can be prevented.
According to the structure of another aspect of the present invention, when the second signal wire formed in an upper wiring layer crosses over the first signal wire formed in a lower wiring layer, a branching portion is formed in the first signal wire or second signal wire, and the second signal wire and first signal wire intersect together with the branching portion, and therefore, at the intersection, the capacitance of the interlayer signal wire provided between the first signal wire and second signal wire is twice as much. As a result, the voltage applied in the interlayer insulating film is about half of the prior art, that is, about 50 V. The withstand voltage of the interlayer insulating film is maximum 60 V, so that the electrostatic damage of the interlayer insulating film hardly takes place.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.
REFERENCES:
patent: 5313319 (1994-05-01), Salisbury
Dudek James
Fujitsu Display Technologies Corporation
Greer Burns & Crain Ltd.
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