Structure and operating method for nonvolatile memory cell

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185280, C365S185290

Reexamination Certificate

active

06940757

ABSTRACT:
A structure and operating method for a nonvolatile memory cell. First and second bit lines are disposed on a substrate. A channel is disposed between the first and second bit lines in an active area. First and second selective gates are disposed on the first and second bit lines respectively. An isolation structure is disposed between the first bit line and the first selective gate and between the second bit line and the second selective gate. A control gate is disposed over the first and second selective gates and the channel. An oxide-nitride-oxide (ONO) layer is disposed between the first and second selective gates and the control gate and between the channel and the control gate.

REFERENCES:
patent: 6418060 (2002-07-01), Yang et al.

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