Structure and method to prevent over erasure of nonvolatile memo

Details Structure and method to prevent over erasure of nonvolatile memo Structure and method to prevent over erasure of nonvolatile memo

1996-12-23

1998-06-30

Le, Vu A.

Static information storage and retrieval

Floating gate

Particular biasing

36518524, 36518518, 36518529, G11C 1140

Patent

active

057744009

ABSTRACT:
A method and structure for preventing over erasure in non-volatile memory cells uses simultaneous erase and program current injections which offset one another. These currents come from two separate injection points within the non-volatile memory transistor and are dominant at different points during the erase operation. The first occurring current erases the non-volatile device and the second prevents over erasure.

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