Patent
1996-12-03
1999-02-23
Auve, Glenn A.
395308, 395281, G06F 1314
Patent
active
058753125
ABSTRACT:
A computer system (6,7) includes first and second I/O circuits (932, 934, 51, 97), first and second buses (904, 83) respectively coupled to the first and second I/O circuits (932, 934, 51, 97), a memory (106), a third bus (104) coupled to the memory (106), and first and second bus interface circuits (902, 6920) connected between the third bus (104) and the first and second buses (904, 83) respectively. A direct memory access (DMA) controller (910) is coupled to the first bus (904) and to the first bus interface circuit (902), and a serial communications circuit (7010, 6910, 7020) is connected between the DMA controller (910) and the second bus interface circuit (6920). As an example, in the present invention a single DMA controller may be used to provide DMA capability to both a notebook computer and a docking station, using an interface between the notebook computer and the docking station to transfer DMA related information between the DMA controller and a requesting device in the docking station. Other devices, systems and methods are also disclosed.
REFERENCES:
patent: 4235496 (1980-11-01), Aug et al.
patent: 5134580 (1992-07-01), Bertram et al.
patent: 5301343 (1994-04-01), Alvarez
patent: 5313596 (1994-05-01), Swindler et al.
patent: 5359715 (1994-10-01), Heil et al.
patent: 5377357 (1994-12-01), Nishigaki et al.
patent: 5450551 (1995-09-01), Amini et al.
patent: 5463742 (1995-10-01), Kobayashi
patent: 5467295 (1995-11-01), Young et al.
patent: 5475854 (1995-12-01), Thomsen et al.
patent: 5488572 (1996-01-01), Belmont
patent: 5517671 (1996-05-01), Parks et al.
patent: 5542053 (1996-07-01), Bland et al.
patent: 5619728 (1997-04-01), Jones et al.
patent: 5621902 (1997-04-01), Cases et al.
Linley Gwennap, Microprocessor Report, "TI Shows Integrated X86 CPU for Notebooks", vol. 8, No. 2. Feb. 14, 1994, pp. 5-7.
Ali M1709, High Performance VESA/PCI/ISA Notebook Chipset, Product Brief, Jan. 8, 1994.
Intel, System I/O SIO 82378IB, Rev. 1.0, Architectural Overview, pp. 1-3, 86-149.
OPTi, 82C596/82C597, Cobra Chipset for Pentium Processors Data Book, Rev. 1.0, Oct. 1994, pp. 1-3, 56-60.
OPTi, Viper Notebook Chipset, 82C556/82C557/82C558N, Preliminary Data Book Ver.0.2, Jun. 1994, pp. i, 1-5, 79-83.
OPTi, 82C836 Chip Set, Single-Chip 386SX AT Data Book, Preliminary, Dec., 1990, pp. 1-6, 49-62.
OPTi, OPTi PCIB, VESA Local Bus to PCI Bridge Interface Chip, 82C822 Data Book, Ver. 0.2 Nov. 30, 1993, pp. 1,2, 6-13.
Intel386 SL Microprocessor SuperSet System Design Guide, The SL SuperSet Architectural Overview, Chapter 2, pp. 2-1-2-10.
Silicon Integrated Systems Corporation, Pentium/P54C PCI/ISA Chipset, 486 Green PC PCI/ISA/VESA Chipset, Green PC ISA-VESA Single Chip and Single Chip for Notebook Computers.
Western Digital, WD8110/LV System Controller 80486SX/DX PC/AT Compatible Desktop, Laptop, Palmtop, and Pen-Based Computers, Sep. 15, 1993, pp. 1-9, 49-55.
Bridgwater James
Haijima Kazumi
Joe Joseph
Milhaupt Robert W.
Walsh James J.
Auve Glenn A.
Donaldson Richard L.
Kesterson James C.
Lake Rebecca Mapstone
Lefkowitz Sumati
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