Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
Reexamination Certificate
2005-06-14
2005-06-14
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
Having specific type of active device
C257S206000
Reexamination Certificate
active
06906360
ABSTRACT:
A structure and method are provided in which an n-type field effect transistor (NFET) and a p-type field effect transistor (PFET) each have a channel region disposed in a single-crystal layer of a first semiconductor and a stress is applied at a first magnitude to a channel region of the PFET but not at that magnitude to the channel region of the NFET. The stress is applied by a layer of a second semiconductor which is lattice-mismatched to the first semiconductor. The layer of second semiconductor is formed over the source and drain regions and extensions of the PFET at a first distance from the channel region of the PFET and is formed over the source and drain regions of the NFET at a second, greater distance from the channel region of the NFET, or not formed at all in the NFET.
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Nayak, Deepak K. et al.;“High-Mobility Strained-Si PMOSFET's,”IEEE Transactions On Electron Devices, vol. 43, No. 10, Oct. 1996, pp. 1709-1716.
Chen Huajie
Chidambarrao Dureseti
Dokumaci Omer O.
Yang Haining S.
Fourson George
Neff Daryl K.
Schnurmann H. Daniel
Toledo Fernando L.
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