Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Isolation by pn junction only
Reexamination Certificate
2002-12-02
2004-07-20
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Isolation by pn junction only
C438S312000, C438S309000, C438S375000, C438S349000, C438S322000, C438S367000, C438S329000, C257S566000, C257S474000, C257S478000, C257S593000, C257S197000
Reexamination Certificate
active
06764918
ABSTRACT:
FIELD OF THE INVENTION
This invention relates in general to semiconductor devices, and more particularly, to high frequency NPN heterojunction bipolar transistors and a method of fabricating such devices.
BACKGROUND OF THE INVENTION
NPN heterojunction bipolar transistors (HBT) are used in many different electronic applications, including integrated circuits and discrete components. An HBT has superior high frequency characteristics in that its frequency of unity current gain f
&tgr;
is higher than that for a homojunction bipolar transistor. An NPN HBT is also faster than a PNP HBT because the mobility of electrons in NPN devices is higher than the mobility of holes in PNP devices. Because of these reasons, an NPN HBT is ideally suited for high speed switching applications. In many instances, the f
&tgr;
of an NPN HBT is 100 GHz or higher.
As an example, an NPN HBT can include a silicon substrate and a silicon germanium layer contacting the silicon substrate. The interface between the silicon substrate and the silicon germanium layer is the heterojunction. The bandgap of silicon can be altered by varying the ratio of germanium to silicon in the heterostructure, producing very high speed bipolar transistors.
Many attempts in further improving NPN HBT performance have focused on decreasing the width of the base region because a narrow base is required for high switching speeds. However, accomplishing such a decrease has proved difficult for a variety of technical reasons.
For example, a limiting factor in making NPN transistors having narrow base widths is the diffusion of the boron dopant atoms in the base region during subsequent thermal process cycles, such as those encountered when forming dielectric layers like thermal oxide over the heterostructure containing the base region. Even though thermal oxide is an ideal passivation layer for silicon because it creates an interface with a low density of surface states and minimal defects, thermal oxidation also aggravates the problem of maintaining a narrow base because the oxidation reaction injects silicon interstitials from the surface into the semiconductor bulk which accelerates the diffusion of certain elements in a phenomena referred to as oxidation enhanced diffusion (OED). In particular, since boron diffuses primarily via an interstitial mechanism, OED significantly enhances the diffusion process, resulting in an undesirable spreading of the doping layer in the base, thereby increasing the base width. As is well known in the art, the frequency of unity current gain is approximately inversely proportional to the square of the base width. Therefore, in conventional NPN heterojunction bipolar transistor structures and methods, there is a limitation as to how thin the base epitaxy can be fabricated when subsequent thermal oxidation is performed.
Accordingly, a need exists for a structure and method of making a high performance NPN heterojunction bipolar transistor having a narrow base doping profile in which the method produces a device having superior high frequency performance.
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“Complete Suppression of Boron Transient-enhanced Diffusion and Oxidation-enhanced Diffusion in Silicon Using Localized Substitutional Carbon Incorpation”, M.S. Carroll et al, 1998 American Institute of Physics, Applied Physics, Applied Physics Letters, vol. 73, No. 25, 21 Dec. 1998, pp. 3695-3697.
Everhart Caridad
Semiconductor Components Industries L.L.C.
Yevsikov Victor V
LandOfFree
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