Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
1997-05-30
2004-09-21
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S763000
Reexamination Certificate
active
06794757
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to semiconductor devices, and more specifically, to a structure and method for forming electrical connections between levels of a semiconductor device.
BACKGROUND OF THE INVENTION
It is a common practice in the fabrication of integrated circuits to make use of an interconnection layer of aluminum, which is highly conductive while being relatively easy to deposit and etch, for connecting different elements of the integrated circuit to each other. This layer usually rests on an insulating layer which in turn is located above a conductive layer. The insulating layer is opened prior to deposition of the aluminum in order to expose the conductive layer surfaces with which to establish a metallic interconnection. These conductive surfaces can be monocrystalline silicon surfaces (transistor sources, drains, collectors, bases and emitters), polycrystalline silicon elements (field-effect transistor gates) or metallic surfaces of another interconnection layer. The contact opening is initially filled or “plugged” with a metallic layer, such as aluminum or tungsten, to make a solid electrical connection between the underlying conductive layer and the overlying interconnection aluminum layer.
However, problems occur with aluminum contact to silicon because of interdiffusion of aluminum in later process steps and may cause spiking in the silicon. To prevent spiking and alloying between an aluminum interconnection metal and silicon surface, a thin “barrier” or nucleation layer is deposited on the exposed silicon surface of the contact opening prior to filling the opening with aluminum. The most useful and practical barrier metal has been a titanium, or titanium nitride on titanium (TiN/Ti) bilayer which deposits well on silicon surfaces and also acts as glue for metal plugs of tungsten on silicon surfaces. The TiN/Ti scheme, however, has one major drawback. It does not deposit well on sidewalls of an opening. The bottom and sidewall coverage is especially important in “hot aluminum plug” processing in order to facilitate the surface diffusion of aluminum atoms into the contact opening and to withstand an even greater tendency for spiking due to the high aluminum deposition temperature. In order to ensure adequate deposition of the barrier film on the bottom and sidewalls of a contact opening for such aluminum plugs, it was previously necessary to step down the contact opening as shown in U.S. Pat. No. 4,592,802. However, such steps of the contact opening uses valuable layout space of a silicon structure.
This problem is partly solved by the use of chemical vapor deposition (CVD) tungsten etched back plug, a process well known in the art and described in U.S. Pat. No. 4,592,802, incorporated herein by reference. In this process, the contact opening is filled with tungsten to a level above the insulating layer to make sure the opening is completely filled. The deposited tungsten is then etched back without a mask until the insulating layer is exposed. Because CVD of tungsten is conformal, i.e., the deposition rate on vertical surfaces is the same as that of horizontal surfaces, this method produces a complete plug in the opening. By using this method, a barrier metal layer is no longer needed to prevent the problem of spiking between an aluminum plug and silicon.
Despite the success achieved with tungsten plugs in preventing spiking, however, it is still desirable to have a barrier metal layer in the contact opening. In order to uniformly deposit tungsten on an insulation layer with contact holes therein, it is strongly preferred to have a nucleation layer, usually of a barrier metal material or other glue material to ensure uniform deposit on all surfaces. Moreover, the barrier metal layer is desirable to prevent a phenomenon known as “tungsten encroachment” or “worm holing.” Tungsten and silicon do not readily react at typical metallization temperatures of less than 500° C. However, the CVD of tungsten is performed using WF
6
and the fluorine in WF
6
reacts with silicon in the presence of tungsten which acts as a catalyst in the reaction. This tungsten encroachment problem is well known in the art and widely reported in industry literatures. A barrier metal layer such as TiN solves this problem by preventing fluorine from contacting silicon surfaces.
While the barrier metal is needed only at the bottom of the contact opening to prevent the tungsten encroachment problem, it is still necessary, or at least desirable, to deposit the barrier metal on the sidewalls of the contact opening as well. This is because tungsten does not readily deposit on an insulating layer such as SiO
2
. Since the contact opening sidewalls are part of the insulating layer, a continuous barrier metal layer on the sidewalls is helpful to ensure conformal deposition of tungsten required to form a complete plug within the contact opening.
Hence, regardless of which metal (aluminum or tungsten) is used as a connection plug, the need for a continuous barrier metal layer on the sidewalls, especially in large aspect ratio contact openings, now about 3.5:1 to as much as 5:1 for advanced integrated circuits, is still present. Because of this, the industry has expended a great deal of effort in achieving conformal deposition of barrier metal in the contact opening. To this end, integrated circuit processing industry has recently developed a CVD of TiN process which provides good sidewall coverage of the contact opening and most manufacturers are moving toward CVD of TiN.
However, a good consistent barrier film in the contact opening which affords good adhesion to all surfaces and prevents encroachment at the bottom of contact openings presents a new difficulty. It is possible, in some instances, due to mask misalignment and other process variations, that the pattern of the metallic interconnection layer over a metal tungsten plug in the contact opening fails to completely cover every portion of that opening. In those cases, during etching of the metallic interconnection layer, the barrier metal exposed to the etching chemical will also be etched, which results in void formation or even etching of the barrier metal along the sidewalls of the contact opening.
Selective etching of tungsten relative to aluminum or titanium is easy to achieve. Tungsten, for example, is selectively etched with fluorine ions over titanium, titanium nitride, and aluminum. In addition, titanium, titanium nitride, and aluminum are selectively etched with chlorine ions relative to tungsten. Because of this etching selectivity, the tungsten plug within the contact opening can be etched back very uniformly and completely using titanium nitride, a barrier metal, as an etch stop. Then during the formation of an aluminum interconnection layer, for example, the tungsten plug is used as an etch stop for the aluminum. This aluminum etch process is relatively long due to the need to remove residual aluminum and titanium nitride near the contact opening.
Unfortunately, the chlorine etch preferred for etching aluminum also etches barrier metals such as titanium or titanium nitride. As a result, the barrier metal between the sidewall and the tungsten plug will also be etched when aluminum is etched. Because the etching period and over etch period for the aluminum metal is relatively long, the barrier metal on the sidewall can erode partially even towards the bottom of the contact opening (see
FIG. 1
, following). This may destroy the underlying conductive region such as a transistor source or drain located underneath the tungsten plug.
One method of preventing this problem is to make the interconnection layer of aluminum sufficiently large over the plug so that it completely covers and encloses the tungsten plug. A minimum enclosure defines the extra surface area which must be added to an interconnection layer in order to compensate for mask misalignment and other process variations. The widened portion over the plug may be typically approximately twice the interconnection layer width for small geometry devi
Cao Phat X.
Carlson David V.
Jorgenson Lisa K.
STMicroelectronics Inc.
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