Structure and method for tying down an unused multi-user bus

Details Structure and method for tying down an unused multi-user bus Structure and method for tying down an unused multi-user bus

1989-06-30

1992-04-28

Shaw, Gareth D.

Boots, shoes, and leggings

395750, 364DIG2, 36492691, 36493542, 36493544, 36493548, 3649484, G06F 132

Patent

active

051094932

ABSTRACT:
A circuit for tying down a computer bus when the bus is idle by monitoring a series of signals which indicate whether the bus is being used and storing the data signal values on the bus, such that when the bus goes idle the last data value on the bus immediately prior to the bus becoming idle is applied to the bus to hold it at its last known signal value. When a new bus operation is initiated the bus is automatically released for normal operation.

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patent: 4454591 (1984-06-01), Lou
patent: 4706082 (1987-11-01), Miesterfeld et al.
patent: 4719458 (1988-01-01), Miesterfeld et al.
patent: 4750177 (1988-06-01), Hendrie et al.
patent: 4766334 (1988-08-01), Warner
patent: 4827471 (1989-05-01), Geiger et al.
patent: 4937734 (1990-06-01), Bechtolsheim
"80C88 CMOS 8/16-Bit Microprocessor," Digital Product Data Book, Harris, pp. 3-81 to 3-105 (1988).

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