Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Reexamination Certificate
2006-10-10
2006-10-10
Hur, J. H. (Department: 2824)
Static information storage and retrieval
Addressing
Including particular address buffer or latch circuit...
C365S233100
Reexamination Certificate
active
07120083
ABSTRACT:
The present invention relates to a structure and method for transferring a column address. In transferring an external column address to the inside of a memory cell, a latch control unit controls the operation of a latch unit for latching the external column address signal. It is thus possible to prohibit consumption of current by controlling the operation of the latch unit when a read or write command signal is inputted.
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patent: 5384745 (1995-01-01), Konishi et al.
patent: 5426606 (1995-06-01), Takai
patent: 6279116 (2001-08-01), Lee
patent: 6351432 (2002-02-01), Higashiho et al.
patent: 1998-45800 (1998-09-01), None
Hur J. H.
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
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