Structure and method for realizing a microelectronic device...

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S347000, C257SE29070, C257S021000

Reexamination Certificate

active

07910917

ABSTRACT:
A microelectronic device provided with one or more quantum wires, able to form one or more transistor channels, and optimized in terms of arrangement, shape, and/or composition. A method for fabricating the device includes forming, in one or more thin layers resting on a support, a first block and a second block in which at least one transistor drain region and at least one transistor source region are respectively intended to be formed, forming a structure connecting the first block to the second block, and forming, on the surface of the structure, wires connecting a first region of the first block with another region of the second block that faces the first region.

REFERENCES:
patent: 5965914 (1999-10-01), Miyamoto
patent: 6121157 (2000-09-01), Nakajima
patent: 6127702 (2000-10-01), Yamazaki et al.
patent: 6632696 (2003-10-01), Kimura et al.
patent: 6727186 (2004-04-01), Skotnicki et al.
patent: 6903460 (2005-06-01), Fukuda et al.
patent: 2004/0051150 (2004-03-01), Wu
patent: 2004/0063286 (2004-04-01), Kim et al.
patent: 2004/0166642 (2004-08-01), Chen et al.
patent: 2004/0227187 (2004-11-01), Cheng et al.
patent: 2006/0258132 (2006-11-01), Brown et al.
patent: 2007/0126035 (2007-06-01), Ernst et al.
Yung-Chun Wu, et al. “High-performance polycrystalline silicon thin-film transistor with multiple nanowire channels and lightly doped drain structure” Applied Physics Letters, vol. 84, No. 19, May 10, 2004, American Institute of Physics, XP001220931, pp. 3822-3824.
J. L. Liu, et al. “A method for fabricating silicon quantum wires based on SiGe/Si heterostructure” Applied Physics Letters, vol. 68, No. 3, Jan. 15, 1996, American Institute of Physics, XP 000552744, pp. 352-354.
H. Okada, et al. “A Novel Wire Transistor Structure with In-Plane Gate Using Direct Schottky Contacts to 2DEG” Extended Abstracts of the 1994 International Conference on Solid State Devices and Materials, XP 000543982, pp. 971-972.
Sung-Young Lee, et al, “A Novel Multibridge-Channel MOSFET (MBCFET): Fabrication Technologies and Characteristics”, IEEE Transactions on Nanotechnology, vol. 2, No. 4, Dec. 2003, pp. 253-257.
U.S. Appl. No. 12/740,907, filed Apr. 30, 2010, Thomas et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Structure and method for realizing a microelectronic device... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Structure and method for realizing a microelectronic device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Structure and method for realizing a microelectronic device... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2670036

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.