Structure and method for placement, sizing and shaping of...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S633000, C438S692000

Reexamination Certificate

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07071074

ABSTRACT:
A material layer on a substrate being processed, e.g. to form chips, includes one or more functional structures. In order to control pattern density during fabrication of the chip, dummy fill structures of different sizes and shapes are added to the chip at different distances from the functional structures of the material layer. In particular, the placement, size and shape of the dummy structures are determined as a function of a distance to, and density of, the functional structures of the material layer.

REFERENCES:
patent: 5639697 (1997-06-01), Weling et al.
patent: 6683382 (2004-01-01), Cwynar et al.
patent: 2003/0102562 (2003-06-01), Tomita
patent: 2005/0132306 (2005-06-01), Smith et al.
Brian Lee, Duane S. Boning, Dale L. Hetherington, David J. Stein, Using Smart Dummy Fill and Selective Reverse Etchback For Pattern Density Equalization, Proc. CMP-MIC, Mar., 2000, pp. 255-258, Santa Clara, CA.

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