Excavating
Patent
1991-06-14
1994-05-31
Canney, Vincent P.
Excavating
371 225, 371 295, G01R 3128
Patent
active
053177118
ABSTRACT:
A structure and a method are provided to bring internal signals of an integrated circuit to the external pins for monitoring purpose. In one embodiment, the signals on an internal bus between an on-chip cache and a CPU in a microprocessor are provided on the microprocessor's pins for a bidirectional data/address bus, when the bidirectional data/address bus is not used for data/address bus transactions with the main memory or the peripheral input/output devices. In this embodiment, reserved pins are used to selectively enable the address/data bus for bringing out the signals of the on-chip bus.
REFERENCES:
patent: 4190885 (1980-02-01), Joyce et al.
patent: 4438490 (1984-03-01), Wilder, Jr.
patent: 4686621 (1987-08-01), Keeley et al.
patent: 4821178 (1989-04-01), Levin et al.
patent: 4935929 (1990-06-01), Sidman et al.
patent: 4967387 (1990-10-01), Shibasaki et al.
patent: 4991090 (1991-02-01), Emma et al.
patent: 5012180 (1991-04-01), Dalrymple et al.
Structured Computer Organization Third Edition by Andrew S. Tanebaum .COPYRGT.1990 by Prentice-Hall, Inc. pp. 126-131 and 165.
Advanced Microprocessors by Daniel Tabak .COPYRGT.1991 by McGraw-Hill, Inc. pp. 275-309 and Appendices 4.A, 4.B and 4.C.
Bourekas Philip A.
Mor Yeshayahu
Revak Scott
Canney Vincent P.
Integrated Device Technology Inc.
LandOfFree
Structure and method for monitoring an internal cache does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Structure and method for monitoring an internal cache, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Structure and method for monitoring an internal cache will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1634742