Structure and method for fabricating integrated circuits

Details Structure and method for fabricating integrated circuits Structure and method for fabricating integrated circuits

1993-09-24

1996-03-19

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257384, 257768, 257776, H01L 2348

Patent

active

055005578

ABSTRACT:
A structure and method for fabricating integrated circuits which provides for the detection of residual conductive material. A first conductive layer is deposited over the integrated circuit and patterned to define a first interconnect layer. An insulating layer is then formed over the integrated circuit. A second conductive layer is then deposited and patterned to define a second interconnect layer. Residual conductive material can be formed during patterning of the second interconnect layer when portions of the second conductive layer remain adjacent to the vertical sidewalls of the first interconnect layer. To make the residual conductive material easier to detect, the conductivity of the residual conductive material is increased by either implanting impurities into the integrated circuit or siliciding the residual conductive material with a refractory metal.

REFERENCES:
patent: 4980752 (1990-12-01), Jones, Jr.
patent: 5066995 (1991-11-01), Young et al.
patent: 5130782 (1992-07-01), Ashwell

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