Structure and method for dual-gate FET with SOI substrate

Details Structure and method for dual-gate FET with SOI substrate Structure and method for dual-gate FET with SOI substrate

2006-09-05

2006-09-05

Jackson, Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Charge transfer device

C257S316000, C257S321000, C257S347000, C257S619000, C257S623000, C257SE21320, C257SE27112

Reexamination Certificate

active

07102181

ABSTRACT:
A method of forming a dual gate fin-type field effect transistor (FinFET) structure patterns silicon fins over an insulator and patterns a gate conductor at an angle to the fins. The gate conductor is formed laterally adjacent to and over center portions of the fins. The gate conductor is planarized such that the gate conductor is separated into distinct gate conductor portions that are separated by the fins. These gate conductor portions include front gates and back gates. The front gates and the back gates alternate along the structure, such that each fin has a front gate on one side and a back gate on the opposite side. Then front gate wiring is formed to the front gates and back gate wiring is formed to the back gates.

REFERENCES:
patent: 6107133 (2000-08-01), Furukawa et al.
patent: 6413802 (2002-07-01), Hu et al.
patent: 2005/0224878 (2005-10-01), Chang
patent: 2005/0224890 (2005-10-01), Bernstein et al.
patent: 2005/0242395 (2005-11-01), Chen et al.
patent: 2005/0269629 (2005-12-01), Lee et al.
patent: 2005/0272190 (2005-12-01), Lee et al.

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