Structure and fabrication method for stackable, air-gap-containi

Details Structure and fabrication method for stackable, air-gap-containi Structure and fabrication method for stackable, air-gap-containi

1996-03-13

1999-02-09

Everhart, Caridad

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

257508, 257760, H01L 23485

Patent

active

058698809

ABSTRACT:
A structured dielectric layer and fabrication process for separating wiring levels and wires within a level on a semiconductor chip is described incorporating a lower dielectric layer having narrow air gaps to form dielectric pillars or lines and an upper dielectric layer formed over the pillars or fine lines wherein the air gaps function to substantially reduce the effective dielectric constant of the structured layer. The invention overcomes the problem of solid dielectric layers which would have the higher dielectric constant of the solid material used.

REFERENCES:
patent: 5407860 (1995-04-01), Stoltz et al.
patent: 5444015 (1995-08-01), Ailken et al.
patent: 5510293 (1996-04-01), Numata
patent: 5559055 (1996-09-01), Chang et al.

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