Patent
1995-08-31
1998-12-29
Bowler, Alyssa H.
39580001, 39580073, G06F 937
Patent
active
058549218
ABSTRACT:
A data prediction structure is provided for a superscalar microprocessor. The data prediction structure stores base addresses and stride values in a prediction array. The base address and the stride value from a location within the data prediction structure indexed by an instruction address are added to form a data prediction address which is then used to fetch data bytes into a reservation station storing an associated instruction. If the data associated with an operand address calculated by an associated functional unit resides in the reservation station, the clock cycles used to perform the load operation have occurred before the instruction reached the reservation station. Additionally, the base address is updated to the address generated by executing an instruction each time the instruction is executed, and the stride value is updated when the data prediction address is found to be incorrect.
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Advanced Micro Devices , Inc.
Bowler Alyssa H.
Davis Jr. Walter D.
Kivlin B. Noel
Merkel Lawrence J.
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