Stress reduction for flip chip package

Details Stress reduction for flip chip package Stress reduction for flip chip package

1999-11-12

2001-04-10

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C257S678000

Reexamination Certificate

active

06214643

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention disclosed broadly relates to the field of integrated circuits, and more particularly rotates to the field of assembly technologies for IC flip chip packages. The invention provides a mechanism for reducing the incidence of delamination due to thermal cycling stress.
2. Description of the Prior Art
The standard method of connecting integrated circuits (“ICs”) to a substrate uses conventional wire-bonding technology. The IC is glued, or otherwise fixed, to the substrate with the circuit facing up and away from the substrate. Perimeter gold wire is then typically used to connect the circuit to the substrate.
An alternative to the standard interconnect method is flip chip technology. With a flip chip the IC is turned over (“flipped”) so that the circuit faces the substrate. Circuit connections can now be accessed directly on the face and do not need to be routed to the perimeter of the IC. The classic method of interconnecting the circuit to the substrate is with solder bumps. Other methods include tape-automated bonding, wire interconnects, isotropic and anisotropic conductive adhesives, metal bumps, compliant bumps, and pressure contacts.
Flip chip provides a number of significant advantages over the conventional approach. These advantages include: shorter leads, no wire bonding, reduced chip wiring costs, lower noise, lower inductance, higher speed, higher i/o density, higher circuit density, smaller device footprint, and lower profile. In particular, power and ground routing is simplified because they can be accessed directly off of the substrate in multiple locations.
FIG. 1
shows a typical die surface
100
with solder bumps
102
. Many other arrays of solder bumps are possible and available.
Typically, the back or top side of the flip chip is exposed. High temperature applications, however, often cover the top of the flip chip with a heat sink. Applying a heat sink directly to the silicon is more thermally efficient than applying a heat sink to the outside of a plastic encapsulation.
In a solder bump flip chip assembly, the solder is typically deposited on the IC and the IC is then placed onto the substrate. The substrate in flip chip assemblies is typically a printed circuit board. This placement can be done, for instance, with a split-beam optical alignment system.
FIG. 2
shows a cross-sectional view of an IC
202
with solder bumps
102
. The IC
202
is first shown alone, and then shown mated to a substrate
206
. The solder bumps
102
provide the electrical connection between the circuit on the IC
202
and the substrate
206
. It also provides a modicum of mechanical strength, but the solder bonds are typically not very strong.
If the IC and the substrate have different rates of thermal expansion, then mechanical stress will occur as the device cycles between room temperature and operating temperature. These cycles are commonly referred to as thermal shock cycles or thermal stress cycles. Silicon has a rate of thermal expansion of roughly 34 ppm/degree C. Ceramic, a common substrate material, has one of roughly 6 ppm/degree C. The problem is exaggerated with less expensive substrate materials such as fiberglass which has a thermal expansion rate of roughly 17 ppm/degree C.
The problem is further exaggerated for devices with a larger footprint. Because the expansion is per unit length, or unit area, in larger devices the thermal expansion produces larger absolute values of expansion over the footprint of the device. The solder bumps for larger devices are said to be at a larger distance from the neutral axis. It follows that the solder bumps in the corners of the IC, assuming a square or rectangular footprint and solder bump array, will be under the greatest stress. These corner solder bumps are, in practice, the first ones to separate from the substrate.
To provide greater mechanical strength and adhesion during the stress cycles, a process known as underfill is commonly used. After soldering the IC to the substrate, an epoxy resin, or other material, is inserted into the space between the IC and the substrate and it acts as a glue. In addition to being inserted into the space, surface tension produces a capillary action between the IC and the substrate which pulls the epoxy into the space. The epoxy is also pulled up along the sides of the IC by the surface tension.
FIG. 3
shows another cross-sectional view of the IC
202
with solder bumps
102
. As in
FIG. 2
, the IC
202
is first shown alone, and then shown mated to the substrate
206
. The mated portion also shows a layer of underfill
302
applied between the IC
202
and the substrate
206
. To make the mechanical bond of the epoxy even stronger, it is possible to roughen up the surface of the substrate or the IC, chemically for instance, before applying the epoxy underfill.
This underfill process provides more strength to the device, but the weak point is still in the corners because they are farthest from the neutral axis. After a sufficient number of thermal stress cycles, the device can acquire a deformed shape, as shown in FIG.
4
. As is illustrated, the solder bumps
402
which are in or near the corners are separated from the substrate
206
and are thus no longer making electrical contact. It is also possible for the solder bumps to break contact with the IC
202
as the IC
202
and the substrate
206
pull away from each other.
FIGS. 5 and 6
show acoustic images of the separation between the IC and the substrate at the corners of the IC. The lighter shade indicates the separation.
As suggested earlier, this problem is exaggerated for larger ICs. The problem is also exaggerated because fiberglass and other inexpensive materials with high rates of thermal expansion are becoming popular substrate materials. Accordingly, there is a need for a method and apparatus for overcoming these problems.
SUMMARY OF THE INVENTION
Briefly, according to one aspect of the invention, an IC for use on a substrate comprises a circuit and an anchoring point. The circuit comprises circuit connections for connecting to the substrate. The anchoring point provides mechanical strength to a bond between the IC and the substrate.
Briefly, according to another aspect of the invention, a method for making an IC for use on a substrate comprises the steps of placing a circuit on the IC and making an anchoring point. The circuit contains circuit connections for connecting to the substrate. The anchoring point provides mechanical strength to a bond between the IC and the substrate.


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