Stress reduction for flip chip package

Details Stress reduction for flip chip package Stress reduction for flip chip package

1998-06-09

2000-01-04

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

257731, 257727, 257738, 257780, 361758, 361783, 361765, H01L 2302

Patent

active

060113014

ABSTRACT:
The bond between a flip chip integrated circuit and a substrate is subject to mechanical stress from thermal cycles. This problem is exaggerated when the substrate has a rate of thermal expansion which is appreciably different from that of silicon. This problem is further exaggerated when the IC has a large footprint because it will experience a larger absolute expansion. A solution is proposed to this problem which involves creating an anchoring point. The anchoring point can be in either the IC or the substrate and can be a through-hole or a surface indentation such as a groove or a cutout. The anchoring point is filled with the underfill material during the underfill process. The anchoring point thus provides additional mechanical strength to the bond between the IC and the substrate.

REFERENCES:
patent: 5136366 (1992-08-01), Worp et al.
patent: 5657207 (1997-08-01), Schreiber et al.
patent: 5703405 (1997-12-01), Zeber
patent: 5786988 (1998-06-01), Harari

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