Stress-reducing structure for electronic devices

Details Stress-reducing structure for electronic devices Stress-reducing structure for electronic devices

2003-03-27

2004-12-14

Stein, Stephen (Department: 1775)

Stock material or miscellaneous articles

Self-sustaining carbon mass or layer with impregnant or...

C428S446000, C428S698000, C428S699000, C428S702000, C257S706000, C438S121000, C438S122000

Reexamination Certificate

active

06830813

ABSTRACT:

TECHNICAL FIELD
Embodiments of the invention relate generally to semiconductor processing.
BACKGROUND
As integrated circuits are scaled down allowing the number of electronic devices on a die to increase, the amount of heat generated during the operation of these integrated circuits increases. Additional ways to remove the generated heat become necessary. One approach to remove heat is to incorporate material layers in a die that provide thermal conductivity away from the integrated circuits formed on the die. However, the incorporated material layers used should not create additional problems in the design, operation, or fabrication of the integrated circuit or die.


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Kostrzewa, M., et al., “Testing the Feasibility of Strain Relaxed Complaint Substrates”,Electronic Materials Conference, Santa Barbara, Abstract, (Jun. 2002), p. 8.
Moran, Peter, et al., “Strain Relexation in Wafer-Bonded SiGe/Si Heterostructures Due to Viscous Flow of an Underlying Borosilicate Glass”,Electronic Materials Conference, Santa Barbara, Abstract, (Jun. 2002), pp. 8-9.
Yin, Haizhou, et al., “High Ge-Content Relaxed Sil-xGex Layers by Relaxation on Complaint Substrate with Controlled Oxidation”,Electronic Materials Conference, Santa Barbara, Abstract, (Jun. 2002), p. 8.

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